MT47H32M16HR-25E AIT:G Micron, MT47H32M16HR-25E AIT:G Datasheet - Page 122
MT47H32M16HR-25E AIT:G
Manufacturer Part Number
MT47H32M16HR-25E AIT:G
Description
DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA
Manufacturer
Micron
Datasheet
1.MT47H64M8CF-25E_ITG.pdf
(129 pages)
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Figure 77: RESET Function
PDF: 09005aef8440dbbc
512mbddr2_ait_aat.pdf – Rev. C 7/11 EN
Bank address
Command
Address
DQS 3
ODT
DM 3
DQ 3
CK#
CKE
A10
R
CK
TT
Bank a
Col n
READ
T0
High-Z
High-Z
Notes:
NOP 2
T1
1. V
2. Either NOP or DESELECT command may be applied.
3. DM represents DM for x4/x8 configuration and UDM, LDM for x16 configuration. DQS
4. In certain cases where a READ cycle is interrupted, CKE going HIGH may result in the
5. Initialization timing is shown in Figure 40 (page 83).
represents DQS, DQS#, UDQS, UDQS#, LDQS, LDQS#, RDQS, and RDQS# for the appropri-
ate configuration (x4, x8, x16).
completion of the burst.
DD
Bank b
Col n
READ
, V
T2
DDL
Micron Confidential and Proprietary
, V
DDQ
NOP 2
Indicates a break in
time scale
T3
, V
DO
TT
, and V
DO
NOP 2
T4
122
System
DO
RESET
512Mb: x8, x16 Automotive DDR2 SDRAM
REF
must be valid at all times.
t DELAY
Unknown
T5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1
R
TT
On
High-Z
High-Z
Transitioning Data
t CL
t CK
2010 Micron Technology, Inc. All rights reserved.
Start of normal 5
initialization
t CL
sequence
NOP 2
Ta0
T = 400ns (MIN)
t CKE (MIN)
All banks
Tb0
PRE
Don’t Care
High-Z
t RPA
Reset
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