MM912F634DV1AER2 Freescale Semiconductor, MM912F634DV1AER2 Datasheet - Page 174
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MM912F634DV1AER2
Manufacturer Part Number
MM912F634DV1AER2
Description
16-bit Microcontrollers - MCU DUAL LS/HS SWITCH W. LIN
Manufacturer
Freescale Semiconductor
Datasheet
1.MM912G634DV1AE.pdf
(338 pages)
Specifications of MM912F634DV1AER2
Rohs
yes
Core
HCS12
Processor Series
MM912F634
Data Bus Width
16 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
4.5 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
15
Interface Type
SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
6
Number Of Timers
1
Program Memory Type
Flash
Supply Voltage - Max
4.5 V
Supply Voltage - Min
4.5 V
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Functional Description and Application Information
4.27.4
4.27.4.1
Each pin can act as a general purpose I/O. In addition, each pin (except PTA5-4) can act as an input or output of a peripheral
module.
4.27.4.2
4.27.4.2.1
This register holds the value driven out to the pin, if the pin is used as a general purpose I/O.
Writing to this register only has an effect on the pin, if the pin is used as a general purpose output. When reading this address,
the buffered and synchronized state of the pin is returned, if the associated data direction register bit is set to “0”.
If the data direction register bits are set to logic level “1”, the contents of the data register is returned. This is independent of any
other configuration
4.27.4.2.2
This register defines whether the pin is used as an input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored
4.27.4.2.3
This is a read-only register and always returns the buffered and synchronized state of the pin
4.27.4.2.4
If the pin is used as an output this register allows the configuration of the drive strength.
Freescale Semiconductor
Functional Description
General
Registers
Data register (PTx)
Data direction register (DDRx)
Input register (PTIx)
Reduced drive register (RDRx)
(Figure
Module
Periph.
46).
data out
output enable
port enable
data in
Figure 46. Illustration of I/O Pin Functionality
DDRx
PTIx
PTx
0
1
synch.
1
0
0
1
Port Integration Module (9S12I32PIMV1)
PIN
(Figure
(Figure
46).
46).
MM912F634
174
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