MM912F634DV1AER2 Freescale Semiconductor, MM912F634DV1AER2 Datasheet - Page 49
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MM912F634DV1AER2
Manufacturer Part Number
MM912F634DV1AER2
Description
16-bit Microcontrollers - MCU DUAL LS/HS SWITCH W. LIN
Manufacturer
Freescale Semiconductor
Datasheet
1.MM912G634DV1AE.pdf
(338 pages)
Specifications of MM912F634DV1AER2
Rohs
yes
Core
HCS12
Processor Series
MM912F634
Data Bus Width
16 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
4.5 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
15
Interface Type
SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
6
Number Of Timers
1
Program Memory Type
Flash
Supply Voltage - Max
4.5 V
Supply Voltage - Min
4.5 V
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Functional Description and Application Information
Freescale Semiconductor
Table 65. Analog die Registers
0x0300–0x03FF D2D Non Blocking Access (D2DI) 3 of 3 (continued)
Offset
0x8C
0x8D
0x82
0x83
0x84
0x85
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8E
0x8F
0x90
0x91
0x92
0x93
0x94
0x95
0x96
ADC Data Result Register 0
ADC Data Result Register 0
ADC Data Result Register 1
ADC Data Result Register 1
ADC Data Result Register 2
ADC Data Result Register 2
ADC Data Result Register 3
ADC Data Result Register 3
ADC Data Result Register 4
ADC Data Result Register 4
ADC Data Result Register 5
ADC Data Result Register 5
ADC Data Result Register 6
ADC Data Result Register 6
ADC Data Result Register 7
ADC Data Result Register 7
ADC Data Result Register 8
ADC Conversion Ctrl Reg
ADC Conversion Ctrl Reg
ADC Conv Complete Reg
ADC Conv Complete Reg
ACCSR (hi)
ACCSR (lo)
ACCR (hi)
ACCR (lo)
ADR0 (hi)
ADR0 (lo)
ADR1 (hi)
ADR1 (lo)
ADR2 (hi)
ADR2 (lo)
ADR3 (hi)
ADR3 (lo)
ADR4 (hi)
ADR4 (lo)
ADR5 (hi)
ADR5 (lo)
ADR6 (hi)
ADR6 (lo)
ADR7 (hi)
ADR7 (lo)
ADR8 (hi)
Name
(60)
- 0x0200–0x02FF D2D Blocking Access (D2DI) 2 of 3/
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
adr0 9
adr0 1
adr1 9
adr1 1
adr2 9
adr2 1
adr3 9
adr3 1
adr4 9
adr4 1
adr5 9
adr5 1
adr6 9
adr6 1
adr7 9
adr7 1
adr8 9
CH15
CC15
CH7
CC7
7
adr0 8
adr0 0
adr1 8
adr1 0
adr2 8
adr2 0
adr3 8
adr3 0
adr4 8
adr4 0
adr5 8
adr5 0
adr6 8
adr6 0
adr7 8
adr7 0
adr8 8
CH14
CC14
CH6
CC6
6
adr0 7
adr1 7
adr2 7
adr3 7
adr4 7
adr5 7
adr6 7
adr7 7
adr8 7
CH5
CC5
5
0
0
0
0
0
0
0
0
0
0
adr0 6
adr1 6
adr2 6
adr3 6
adr4 6
adr5 6
adr6 6
adr7 6
adr8 6
CH12
CC12
CH4
CC4
4
0
0
0
0
0
0
0
0
adr0 5
adr1 5
adr2 5
adr3 5
adr4 5
adr5 5
adr6 5
adr7 5
adr8 5
CH11
CC11
CH3
CC3
3
0
0
0
0
0
0
0
0
adr0 4
adr1 4
adr2 4
adr3 4
adr4 4
adr5 4
adr6 4
adr7 4
adr8 4
CH10
CC10
CH2
CC2
2
0
0
0
0
0
0
0
0
adr0 3
adr1 3
adr2 3
adr3 3
adr4 3
adr5 3
adr6 3
adr7 3
adr8 3
CH9
CH1
CC9
CC1
1
0
0
0
0
0
0
0
0
Introduction
MM912F634
adr0 2
adr1 2
adr2 2
adr3 2
adr4 2
adr5 2
adr6 2
adr7 2
adr8 2
CH8
CH0
CC8
CC0
0
0
0
0
0
0
0
0
0
49
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