MM912F634DV1AER2 Freescale Semiconductor, MM912F634DV1AER2 Datasheet - Page 47
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MM912F634DV1AER2
Manufacturer Part Number
MM912F634DV1AER2
Description
16-bit Microcontrollers - MCU DUAL LS/HS SWITCH W. LIN
Manufacturer
Freescale Semiconductor
Datasheet
1.MM912G634DV1AE.pdf
(338 pages)
Specifications of MM912F634DV1AER2
Rohs
yes
Core
HCS12
Processor Series
MM912F634
Data Bus Width
16 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
4.5 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
15
Interface Type
SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
6
Number Of Timers
1
Program Memory Type
Flash
Supply Voltage - Max
4.5 V
Supply Voltage - Min
4.5 V
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Functional Description and Application Information
Freescale Semiconductor
Table 65. Analog die Registers
0x0300–0x03FF D2D Non Blocking Access (D2DI) 3 of 3 (continued)
Offset
0x05
0x08
0x09
0x10
0x12
0x13
0x14
0x15
0x16
0x18
0x20
0x21
0x22
0x28
0x29
0x30
0x31
0x32
0x38
0x11
Port B Configuration Register 1
Watchdog Service Register
High Side Control Register
Wake Up Control Register
Wake Up Source Register
Low Side Control Register
High Side Status Register
Low Side Status Register
Low-Side Control Enable
Port B Config Register 2
Timing Control Register
Voltage Status Register
Mode Control Register
Reset Status Register
Port B Data Register
Hall Supply Register
Lx Control Register
Watchdog Register
Lx Status Register
LIN Register
Register
LSCEN
PTBC1
PTBC2
WDSR
Name
HSCR
HSSR
LXCR
LSCR
LSSR
WDR
WCR
WSR
MCR
LINR
VSR
TCR
RSR
HSR
LXR
PTB
(60)
- 0x0200–0x02FF D2D Blocking Access (D2DI) 2 of 3/
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
LINOTIE
HSOTIE
WDOFF
LSOTIE
HSOTC
LSOTC
HOTIE
FWU
7
0
0
0
0
0
0
0
0
0
CSSEL
HSHVSD
LINOTC
WDWO
LINWU
PUEB2
HOTC
6
0
0
0
0
0
0
E
0
0
0
0
0
FWM
PWMCS2 PWMCS1 PWMHS2 PWMHS1
PWMCS2 PWMCS1 PWMLS2 PWMLS1
PUEB1
L5WU
L5WE
L5DS
WDR
RX
L5
5
0
0
0
0
0
0
0
0
0
VROVC
PUEB0
L4WU
L4WE
L4DS
EXR
TX
L4
4
0
0
0
0
0
0
0
0
WDSR
PWMCS
HS2CL
LS2CL
L3WU
L3WE
L3DS
LVSD
WUR
HTC
L3
3
0
0
0
0
0
PWMEN
DDRB2
HS1CL
LS1CL
LINEN
L2WU
L2WE
L2DS
LVRX
PTB2
HVC
L2
2
0
0
LSCEN
CST
DDRB1
HS2OL
WDTO
LS2OL
L1WE
L1WU
L1DS
PTB1
LVC
LVR
HS2
LS2
L1
1
0
SERMOD
MODE
LINSR
Introduction
MM912F634
HSUPON
DDRB0
HS1OL
LS1OL
L0WE
L0WU
L0DS
PTB0
POR
LBC
HS1
LS1
L0
0
47
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