ACS422A68TAGZBX8 IDT, ACS422A68TAGZBX8 Datasheet - Page 11

• Manufacturer Part Number: ACS422A68TAGZBX8
• Description: Interface - CODECs
• Manufacturer: IDT

Specifications of ACS422A68TAGZBX8

• Rohs: yes
• Part # Aliases: IDTACS422A68TAGZBX8

ACS422x68
LOW-POWER, HIGH-FIDELITY, INTEGRATED CODEC
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
2. POWER MANAGEMENT
2.1.
The ACS422x68 has control registers to enable system software to control which functions are active. To minimize
power consumption, unused functions should be disabled. To avoid audio artifacts, it is important to enable or disable
functions in the correct order.
0x1A
Power Management 1
0x1B
Power Management 2
Register Address
Register Address
Control Registers
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
DIGENB
INSELR
INSELL
PGAR
ADCR
SPKR
Label
BSTR
PGAL
ADCL
Label
SPKL
VREF
BSTL
MICB
HPR
D2S
HPL
Table 1. Power Management Register 1
Table 2. Power Management Register 2
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
Default
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Analog in Boost Left
0 = Power down, 1 = Power up
Analog in Boost Right
0 = Power down, 1 = Power up
Analog in PGA Left
0 = Power down, 1 = Power up
Analog in PGA Right
0 = Power down, 1 = Power up
ADC Left
0 = Power down,1 = Power up
ADC Right
0 = Power down. 1 = Power up
MICBIAS
0 = Power down, 1 = Power up
Master clock disable
0: master clock enabled, 1: master clock disabled
Analog in D2S AMP
0 = Power down, 1 = Power up
LHP Output Buffer + DAC
0 = Power down, 1 = Power up
RHP Output Buffer + DAC
0 = Power down, 1 = Power up
LSPK Output Buffer
0 = Power down, 1 = Power up
RSPK Output Buffer
0 = Power down, 1 = Power up
Analog in Select Mux Left
0 = Power down, 1 = Power up
Analog in Select Mux Right
0 = Power down, 1 = Power up
VREF (necessary for all other functions)
0 = Power down, 1 = Power up
Description
Description
ACS422X68
V1.6 01/13