ACS422A68TAGZBX8 IDT, ACS422A68TAGZBX8 Datasheet - Page 36

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ACS422A68TAGZBX8

Manufacturer Part Number
ACS422A68TAGZBX8
Description
Interface - CODECs
Manufacturer
IDT
Datasheet

Specifications of ACS422A68TAGZBX8

Rohs
yes
Part # Aliases
IDTACS422A68TAGZBX8
ACS422x68
LOW-POWER, HIGH-FIDELITY, INTEGRATED CODEC
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
The BTL amplifier in ACS422x68 will continuously adjust to power supply changes to ensure that the
full scale output power remains constant. This is not an automatic level control. Rather, this function
prevents sudden volume changes when switching between battery and line power. Please note,
when in this mode the amplifier efficiency may be reduced and decreases with higher supply volt-
ages and lower target values.
A simple 5-bit ADC is used to monitor PVDD. As PVDD raises or lowers, the analog circuit will send
a 5-bit code to the digital section that will average and then calculate a gain adjustment. The BTL
audio signal will be multiplied by this gain value (in addition to the user volume controls).
The user will select a target value for the circuit. The constant output function will calculate a gain
adjustment that will provide approximately the same full scale output voltage as provided when
PVDD causes the same code value. So, if the target is 9 then a PVDD voltage of about 3.7V would
generate a code value of 9 and a full scale output power of about 630mW into 8 ohms. If PVDD
should rise to 4V, generating a code of 13, then the constant output power circuit would reduce the
gain by 0.75dB (4 codes * 0.1875dB) to keep the full scale output at the target level.
The circuit may be configured to add gain, attenuation, or both to maintain the full-scale output level.
If the needed adjustment falls outside of the range of the circuit (only attenuation is enabled and gain
is needed, for example) then the circuit will apply as much correction as it is able. Through the use of
gain, attenuation, and target values, different behaviors may be implemented:
In addition to maintaining a constant output level, PVDD may be monitored for a large, sudden,
change. If the High Delta function is enabled and PVDD changes more than 4 code steps since the
last cycle, the output will be rapidly reduced then gradually increased to the target level.
When using this circuit, please take note of the following:
Attenuation only, target set to mimic a low supply voltage - Constant output level across bat-
tery state with constant quality (THD/SNR)
Attenuation only, target set to mimic a moderate supply voltage - Output limiting to an
approximate power level. Level will decrease at lower supply voltages but won’t increase
beyond a specific point.
Gain only, target at or near max - Output will remain relatively constant but distortion will
increase as PVDD is lowered. This mimics the behavior of common class-AB amplifiers.
Gain and attenuation - Output remains at a level below the maximum possible at the highest
supply voltage and above the theoretical full scale at minimum supply. Full scale PCM input
clips when the supply voltage is low but won’t become too loud when the supply voltage is
high.
The full scale output power may be limited by the supply voltage.
Full scale output power is affected by other gain controls in the output path including the EQ
and compressor/limiter.
The Constant Output Power function is intended to help maintain a constant output level, not
an exact output level. The output level for a specific target may vary part to part. If limiting is
required for safety or other reasons, be conservative and set the target well below the maxi-
mum allowable level.
Noise on the PVDD supply may cause erratic behavior. Use the recommended supply
decoupling caps and verify that the power supply can support the peak currents demanded
by a class-D amplifier.
36
ACS422X68
V1.6 01/13

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