DS3172 Maxim Integrated, DS3172 Datasheet - Page 138

• Manufacturer Part Number: DS3172
• Description: Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
• Manufacturer: Maxim Integrated

Specifications of DS3172

• Part # Aliases: 90-31720-000

Bit 1: Transmit Framer IO Signal Timing Select (TFTS). This bit controls the timing reference for the signals on
the transmit framer interface IO pins. The pins controlled are TSOFIn, TSERn, and TSOFOn / TDENn. See
10-7
Bit 0: Transmit Line IO Signal Timing Select (TLTS). This bit controls the timing reference for the signals on the
transmit line interface IO pins. The pins controlled are TPOSn / TDATn and TNEGn. See
details.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 10 to 8: Loopback Mode [2:0] (LBM[2:0]). These bits select the loopback modes for analog loopback (ALB),
line loopback (LLB), payload loopback (PLB) and diagnostic loopback (DLB). See
select codes. Default: No Loopback.
Bits 7 to 4: General-Purpose IO B Output Select[3:0] (GPIOB[3:0]) These bits determine which alarm status
signal to output on the GPIO2(port 1), GPIO4(port 2), GPIO6(port 3) or GPIO8(port 4) pins. The GPIO pin must be
enabled by setting the bits in the
signal. See
Bits 3 to 0: General-Purpose IO A Output Select[3:0] (GPIOA[3:0]) These bits determine which alarm status
signal to output on the GPIO1(port 1), GPIO3(port 2), GPIO5(port 3) or GPIO7(port 4) pins. The GPIO pin must be
enabled for output by setting the bits in the
Table 10-16
for more details.
0 = Use output clocks for timing reference
1 = Use input clocks for timing reference
0 = Use output clocks for timing reference
1 = Use input clocks for timing reference
0 = Use output clocks for timing reference
1 = Use input clocks for timing reference
Table 10-15.
GPIOB3
for the alarm select codes.
15
--
0
7
0
See
GPIOB2
14
--
0
6
0
Table 10-16
PORT.CR4
Port Control Register 4
(0,2,4,6)46h
GL.GIOCR
GPIOB1
13
--
0
5
0
for the alarm select codes.
GL.GIOCR
and either
GPIOB0
12
--
0
0
4
138
GL.CR1
register. See
RESERVED
GPIOA3
or
11
0
3
0
GL.CR2
Table 10-15
registers to output the selected alarm
GPIOA2
LBM2
10
0
2
0
for configuration settings. See
Table 10-17
GPIOA1
LBM1
9
0
1
0
Table 10-6
for the loopback
GPIOA0
LBM0
for more
8
0
0
0
Table