DS3172 Maxim Integrated, DS3172 Datasheet - Page 175
![no-image](/images/no-image-200.jpg)
DS3172
Manufacturer Part Number
DS3172
Description
Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
Manufacturer
Maxim Integrated
Datasheet
1.DS3171.pdf
(234 pages)
Specifications of DS3172
Part # Aliases
90-31720-000
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Receive Trail Trace Identifier Data (RTD[7:0]) – These eight bits are the receive trail trace identifier
data. The receive trail trace identifier address will be incremented whenever these bits are read (when byte Fh is
read, the address will return to 0h).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Expected Trail Trace Identifier Data (ETD[7:0]) – These eight bits are the expected trail trace
identifier data. The expected trail trace identifier address will be incremented whenever these bits are read or
written (when byte Fh is read or written, the address will return to 0h).
RTD7
ETD7
15
15
--
--
0
7
0
0
7
0
RTD6
ETD6
14
14
--
--
0
6
0
0
6
0
TT.RIR
Trail Trace Receive Identifier Register
(0,2,4,6)FCh
TT.EIR
Trail Trace Expected Identifier Register
(0,2,4,6)FEh
RTD5
ETD5
13
13
--
--
0
5
0
0
5
0
RTD4
ETD4
12
12
--
0
0
--
0
0
4
4
175
RTD3
ETD3
11
11
--
--
0
3
0
0
3
0
RTD2
ETD2
10
10
--
--
0
2
0
0
2
0
RTD1
ETD1
--
--
9
0
1
0
9
0
1
0
RTD0
ETD0
--
--
8
0
0
0
8
0
0
0
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