DS3172 Maxim Integrated, DS3172 Datasheet - Page 87

no-image

DS3172

Manufacturer Part Number
DS3172
Description
Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS3172

Part # Aliases
90-31720-000

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS3172+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS3172N+
Manufacturer:
Maxim Integrated
Quantity:
10 000
10.6.6.3 Transmit M23 DS3 Error Insertion
Error insertion inserts various types of errors into the different DS3 overhead bits. The types of errors that can be
inserted are framing errors and P-bit parity errors.
The framing error insertion mode is programmable (F-bit, M-bit, SEF, or OOMF). An F-bit error is a single subframe
alignment bit (F
error in all the subframe alignment bits in a subframe (F
alignment bit (M
A P-bit parity error is generated by is inverting the value of the P-bits (P
error(s) can be inserted one error at a time, or continuously. The P-bit parity error insertion mode (single or
continuous) is programmable.
Each error type (framing or P-bit parity) has a separate enable. Continuous error insertion mode inserts errors at
every opportunity. Single error insertion mode inserts an error at the next opportunity when requested. The framing
multi-error insertion modes (SEF or OOMF) insert the indicated number of error(s) at the next opportunities when
requested; i.e., a single request will cause multiple errors to be inserts. The requests can be initiated by a register
bit(TSEI) or by the manual error insertion input (TMEI). The error insertion request source (register or input) is
programmable. The insertion of each particular error type is individually enabled. Once all error insertion has been
performed, the data stream is passed on to overhead insertion.
10.6.6.4 Transmit M23 DS3 Overhead Insertion
Overhead insertion can insert any (or all) of the DS3 overhead bits into the DS3 frame. The DS3 overhead bits X
X
TOHSOF). The P-bits (P
internally generated bit). The DS3 overhead insertion is fully controlled by the transmit overhead interface. If the
transmit overhead data enable signal (TOHEN) is driven high, then the bit on the transmit overhead signal (TOH) is
inserted into the output data stream. Insertion of bits using the TOH signal overwrites internal overhead insertion.
10.6.6.5 Transmit M23 DS3 AIS/Idle Generation
M23 DS3 AIS/Idle generation overwrites the data stream with AIS or an Idle signal. If transmit Idle is enabled, the
data stream payload is forced to a 1100 pattern with two ones immediately following each DS3 overhead bit. M
M
overwritten with the values one, zero, zero, and one (1001) respectively. X
P
are overwritten with 000.
If transmit AIS is enabled, the data stream payload is forced to a 1010 pattern with a one immediately following
each DS3 overhead bit. M
F
are overwritten with 11. P
And, C
10.6.6.5.1 Receive M23 DS3 Frame Format
The DS3 frame format is shown in
referred to as the far-end SEF/AIS bits). P
are the multiframe alignment bits that define the multiframe boundary. F
define the subframe boundary. Note: Both the M-bits and F-bits define the DS3 frame boundary. C
Application Identification Channel (AIC). C
10.6.6.5.2 Receive M23 DS3 Overhead Extraction
Overhead extraction extracts all of the DS3 overhead bits from the M23 DS3 frame. All of the DS3 overhead bits
X
P
X1
2
2
1
1
2
, P
, X
, and M
and P
are overwritten with the calculated payload parity from the previous output DS3 frame. And, C
, F
2
1
X2
, P
, P
X1
, F
, C
1
2
2
, P
, M
3
bits are output as an error indication (modulo 2 addition of the calculated parity and the bit).
X3
X2
bits are overwritten with the values zero, one, and zero (010) respectively. F
, and F
2
, M
X
, and C
, F
XY
1
X
, M
XY
, F
) error. An M-bit error is a single multiframe alignment bit (M
, and C
X4
2
XY
X3
, or M
, and C
bits are overwritten with the values one, zero, zero, and one (1001) respectively. X
are overwritten with 000. AIS will overwrite a transmit Idle signal.
1
1
1
3
XY
, M
) error in each of two consecutive DS3 frames.
and P
and P
XY
can be sourced from the transmit overhead interface (TOHCLK, TOH, TOHEN, and
2
, and M
are output on the receive overhead interface (ROH, ROHSOF, and ROHCLK). The
2
2
) are received as an error mask (modulo 2 addition of the input bit and the
are overwritten with the calculated payload parity from the previous DS3 frame.
Figure
3
bits are overwritten with the values zero, one, and zero (010) respectively.
X1
1
10-14. The X
and P
, C
X2
, and C
2
are the parity bits used for line error monitoring. M
X1
X3
1
87
, F
and X
are the stuff control bits for tributary #X.
X2
, F
2
X3
are the Remote Defect Indication (RDI) bits (also
, and F
1
and P
X4
XY
1
). An OOMF error is a single multiframe
and X
1
are the subframe alignment bits that
, M
2
) in a single DS3 frame. P-bit parity
2
, or M
2
are overwritten with 11. P
X1
3
) error. An SEF error is an
, F
X2
, F
X3
, and F
31
, C
1
, M
32
X4
, and C
2
11
1
, and M
bits are
and X
is the
1
and
33
1
1
2
3
,
,

Related parts for DS3172