C8051F587-IMR Silicon Labs, C8051F587-IMR Datasheet - Page 104
C8051F587-IMR
Manufacturer Part Number
C8051F587-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F587-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F58x/F59x
SFR Definition 12.1. PSBANK: Program Space Bank Select
SFR Address = 0xF5; SFR Page = All Pages
12.1.1. MOVX Instruction and Program Memory
The MOVX instruction in an 8051 device is typically used to access external data memory. On the
C8051F58x/F59x devices, the MOVX instruction is normally used to read and write on-chip XRAM, but can
be re-configured to write and erase on-chip Flash memory space. MOVC instructions are always used to
read Flash memory, while MOVX write instructions are used to erase and write Flash. This Flash access
feature provides a mechanism for the C8051F58x/F59x to update program code and use the program
memory space for non-volatile data storage. Refer to Section “15. Flash Memory” on page 138 for further
details.
12.2. Data Memory
The C8051F58x/F59x devices include 8448 bytes of RAM data memory. 256 bytes of this memory is
mapped into the internal RAM space of the 8051. The other 8192 bytes of this memory is on-chip “exter-
nal” memory. The data memory map is shown in Figure 12.1 for reference.
104
Note: COBANK[1:0] and IFBANK[1:0] should not be set to select Bank 3 (11b) on the C8051F584/5/6/7-F590/1
Name
Reset
7:6
5:4 COBANK[1:0] Constant Operations Bank Select.
3:2
1:0
Bit
Type
Bit
devices.
IFBANK[1:0] Instruction Fetch Operations Bank Select.
Reserved
Reserved
Name
R/W
7
0
Read = 00b, Must Write = 00b.
These bits select which Flash bank is targeted during constant operations (MOVC
and Flash MOVX) involving address 0x8000 to 0xFFFF.
00: Constant Operations Target Bank 0 (note that Bank 0 is also mapped between
0x0000 to 0x7FFF).
01: Constant operations target Bank 1.
10: Constant operations target Bank 2.
11: Constant operations target Bank 3.
Read = 00b, Must Write = 00b.
These bits select which Flash bank is used for instruction fetches involving address
0x8000 to 0xFFFF. These bits can only be changed from code in Bank 0.
00: Instructions fetch from Bank 0 (note that Bank 0 is also mapped between
0x0000 to 0x7FFF).
01: Instructions fetch from Bank 1.
10: Instructions fetch from Bank 2.
11: Instructions fetch from Bank 3.
R/W
6
0
R/W
COBANK[1:0]
5
0
R/W
Rev. 1.2
4
1
Function
R/W
3
0
R/W
2
0
R/W
1
0
IFBANK[1:0]
R/W
0
1
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