C8051F587-IMR Silicon Labs, C8051F587-IMR Datasheet - Page 207
C8051F587-IMR
Manufacturer Part Number
C8051F587-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F587-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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SFR Definition 20.22. P2MDIN: Port 2 Input Mode
SFR Address = 0xF3; SFR Page = 0x0F
SFR Definition 20.23. P2MDOUT: Port 2 Output Mode
SFR Address = 0xA6; SFR Page = 0x0F
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0 P2MDOUT[7:0] Output Configuration Bits for P2.7–P2.0 (respectively).
Type
Type
Bit
Bit
P2MDIN[7:0]
Name
Name
7
1
7
0
Analog Configuration Bits for P2.7–P2.0 (respectively).
Port pins configured for analog mode have their weak pull-up and digital receiver
disabled. For analog mode, the pin also needs to be configured for open-drain
mode in the P2MDOUT register.
0: Corresponding P2.n pin is configured for analog mode.
1: Corresponding P2.n pin is not configured for analog mode.
These bits are ignored if the corresponding bit in register P2MDIN is logic 0.
0: Corresponding P2.n Output is open-drain.
1: Corresponding P2.n Output is push-pull.
6
1
6
0
5
1
5
0
Rev. 1.2
P2MDOUT[7:0]
4
1
4
0
P2MDIN[7:0]
R/W
R/W
Function
Function
3
1
3
0
C8051F58x/F59x
2
1
2
0
1
1
1
0
0
1
0
0
207
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