C8051F587-IMR Silicon Labs, C8051F587-IMR Datasheet - Page 115
![no-image](/images/no-image-200.jpg)
C8051F587-IMR
Manufacturer Part Number
C8051F587-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F587-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 115 of 356
- Download datasheet (3Mb)
SFR Definition 13.3. SFRNEXT: SFR Next
SFR Address = 0x85; SFR Page = All Pages
Bit
7:0
Name
Reset
Type
Bit
SFRNEXT[7:0]
Name
7
0
SFR Page Bits.
This is the value that will go to the SFR Page register upon a return from inter-
rupt.
Write: Sets the SFR Page contained in the second byte of the SFR Stack. This
will cause the SFRPAGE SFR to have this SFR page value upon a return from
interrupt.
Read: Returns the value of the SFR page contained in the second byte of the
SFR stack.
SFR page context is retained upon interrupts/return from interrupts in a 3 byte
SFR Page Stack: SFRPAGE is the first entry, SFRNEXT is the second, and
SFRLAST is the third entry. The SFR stack bytes may be used alter the context
in the SFR Page Stack, and will not cause the stack to “push” or “pop”. Only
interrupts and return from interrupts cause pushes and pops of the SFR Page
Stack.
6
0
5
0
Rev. 1.2
SFRNEXT[7:0]
4
0
R/W
Function
3
0
C8051F58x/F59x
2
0
1
0
0
0
115
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