C8051F587-IMR Silicon Labs, C8051F587-IMR Datasheet - Page 263
![no-image](/images/no-image-200.jpg)
C8051F587-IMR
Manufacturer Part Number
C8051F587-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F587-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 263 of 356
- Download datasheet (3Mb)
25. UART1
UART1 is an asynchronous, full duplex serial port offering modes 1 and 3 of the standard 8051 UART.
Enhanced baud rate support allows a wide range of clock sources to generate standard baud rates (details
in Section “25.1. Enhanced Baud Rate Generation” on page 264). Received data buffering allows UART1
to start reception of a second incoming data byte before software has finished reading the previous data
byte.
UART1 has two associated SFRs: Serial Control Register 1 (SCON1) and Serial Data Buffer 1 (SBUF1).
The single SBUF1 location provides access to both transmit and receive registers. Writes to SBUF1
always access the Transmit register. Reads of SBUF1 always access the buffered Receive register;
it is not possible to read data from the Transmit register.
With UART1 interrupts enabled, an interrupt is generated each time a transmit is completed (TI1 is set in
SCON1), or a data byte has been received (RI1 is set in SCON1). The UART1 interrupt flags are not
cleared by hardware when the CPU vectors to the interrupt service routine. They must be cleared manually
by software, allowing software to determine the cause of the UART1 interrupt (transmit complete or receive
complete).
Rate Generator
UART Baud
Write to
SBUF
Figure 25.1. UART1 Block Diagram
Tx Clock
Rx Clock
Stop Bit
Start
Start
Read
SBUF
SCON
D
TB8
SET
CLR
Shift
Input Shift Register
Q
Shift
SFR Bus
(RX Latch)
Rx Control
(9 bits)
Tx Control
SBUF
0x1FF
SFR Bus
Zero Detector
(TX Shift)
SBUF
Rev. 1.2
RB8
Load SBUF
Tx IRQ
Rx IRQ
RI
TI
SBUF
Load
Send
Data
Interrupt
Serial
Port
RX
TX
C8051F58x/F59x
Crossbar
Crossbar
Port I/O
263
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