MT48H8M16LFB4-8 TR Micron Technology Inc, MT48H8M16LFB4-8 TR Datasheet - Page 19

• Manufacturer Part Number: MT48H8M16LFB4-8 TR
• Description: IC SDRAM 128MBIT 125MHZ 54VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H8M16LFB4-8 TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 125MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1052-2

Figure 7: Activating a Specific Row in a Specific Bank Register
Figure 8: Meeting
READs
PDF: 09005aef80c97087/Source: 09005aef80c97015
MT48H8M16_2.fm - Rev. E 3/05 EN
t
COMMAND
READ bursts are initiated with a READ command, as shown in Figure 9 on page 20.
The starting column and bank addresses are provided with the READ command, and
auto precharge is either enabled or disabled for that burst access. If auto precharge is
enabled, the row being accessed is precharged at the completion of the burst. For the
generic READ commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address will
be available following the CAS latency after the READ command. Each subsequent data-
out element will be valid by the next positive clock edge. Figure 5, "CAS Latency," on
page 12, shows general timing for each possible CAS latency setting.
Upon completion of a burst, assuming no other commands have been initiated, the DQ
will go High-Z. A full-page burst will continue until terminated. (At the end of the page, it
will wrap to column 0 and continue.)
Data from any READ burst may be truncated with a subsequent READ command, and
data from a fixed-length READ burst may be immediately followed by data from a READ
command. In either case, a continuous flow of data can be maintained. The first data
element from the new burst follows either the last element of a completed burst or the
A0–A10, A11
RCD (MIN) When 2 <
BA0, BA1
CLK
RAS#
CAS#
WE#
CLK
CKE
CS#
HIGH
ACTIVE
T0
ADDRESS
ADDRESS
BANK
ROW
NOP
T1
t
19
DON’T CARE
RCD (MIN)/
t
RCD
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
NOP
t
CK< 3
READ or
128Mb: x16 Mobile SDRAM
WRITE
T3
DON’T CARE
©2003 Micron Technology, Inc. All rights reserved.
T4
READs