MT46H8M16LFCF-10 IT Micron Technology Inc, MT46H8M16LFCF-10 IT Datasheet - Page 61
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MT46H8M16LFCF-10 IT
Manufacturer Part Number
MT46H8M16LFCF-10 IT
Description
IC DDR SDRAM 128MBIT 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Specifications of MT46H8M16LFCF-10 IT
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (8Mx16)
Speed
100MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
-40°C ~ 85°C
Package / Case
60-VFBGA
Organization
8Mx16
Density
128Mb
Address Bus
15b
Access Time (max)
7ns
Maximum Clock Rate
104MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
90mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 39:
PDF: 09005aef822b7e27/Source: 09005aef822b7dd6
MT46H8M16LFB_2.fm - Rev. A 5/06 EN
COMMAND
Case 1:
Case 2:
BA0, BA1
A11, A12
A0–A9
t
t
AC
AC
DQS
DQ
DQS
DQ
CK#
CKE
A10
DM
CK
(MIN)
(MAX)
5
1
1
Bank Read – Without Auto Precharge
and
and
t
t
IS
IS
NOP 6
t
DQSCK
t
T0
DQSCK
Notes:
t
t
IH
IH
(MIN)
(MAX)
1. D
2. BL = 4 in the case shown.
3. Disable auto precharge.
4. PRE = PRECHARGE, ACT = ACTIVE, RA = Row address, BA = Bank address.
5. NOP commands are shown for ease of illustration; other commands may be valid at these
6. The PRECHARGE command can only be applied at T5 if
7. Refer to Figure 32 on page 55 and Figure 33 on page 56 for detailed DQS and DQ timing.
Bank x
t
t
IS
IS
ACT
RA
RA
T1
RA
times.
t
t
OUT
IH
IH
t
CK
n = data-out from column n.
t
t
RAS 7
RCD
t
RC
NOP 6
T2
t
CH
t
CL
Bank x
READ 2
t
Col n
IS
3
T3
t
IH
61
NOP 6
T4
CL = 3
128Mb: 8 Meg x 16 Mobile DDR SDRAM
CL = 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
LZ
t
LZ
(MIN)
(MAX)
ALL BANKS
ONE BANK
Bank x 4
PRE 7
T5
t
AC
t
t
RPRE
AC
(MIN)
T5n
(MAX)
t
RPRE
t
RP
t
D
RAS minimum is met.
TRANSITIONING DATA
OUT
n
NOP 6
T6
D
OUT
n
t
t
DQSCK
DQSCK
D
n + 1
OUT
T6n
©2006 Micron Technology, Inc. All rights reserved.
D
n + 1
OUT
(MIN)
(MAX)
D
n + 2
Timing Diagrams
OUT
NOP 6
T7
D
n + 2
OUT
t
HZ
t
D
RPST
n + 3
t
HZ
OUT
(MIN)
t
D
n + 3
(MAX)
RPST
OUT
DON’T CARE
Bank x
ACT
T8
RA
RA
RA
Advance