LTC4245CUHF#PBF Linear Technology, LTC4245CUHF#PBF Datasheet
LTC4245CUHF#PBF
Specifications of LTC4245CUHF#PBF
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LTC4245CUHF#PBF Summary of contents
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... The controller has additional features to interrupt the host when a fault has occurred, notify when output power is good, detect insertion of a load card and power-up in either the on or off state. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 5V OUT ...
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LTC4245 ABSOLUTE AXI U RATI GS (Notes 1, 2) Supply Voltages 12V ..................................................... –0.3V to 20V .............................................. –0.3V to 10V ...................................................... –20V to 0.3V EEIN INTV .................................................. –0.3V to 6.5V ...
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ELECTRICAL CHARACTERISTICS range, otherwise specifi cations are 25° SYMBOL PARAMETER Supplies I Input Supply Current DD V Supply Undervoltage Lockout UVL V Internal Regulator Voltage CC Current Limit ΔV Circuit Breaker Trip Sense Voltage SNS(CB) ...
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LTC4245 ELECTRICAL CHARACTERISTICS range, otherwise specifi cations are 25° SYMBOL PARAMETER V Power Bad Threshold Voltage PB(TH) V Logic Input Threshold IN(TH) I Pin Input Current IN V Output Low Voltage OL V ADR2, ADR3, ...
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ELECTRICAL CHARACTERISTICS range, otherwise specifi cations are 25° SYMBOL PARAMETER ADC RES Resolution (No Missing Codes) V Full-Scale Voltage (V = 255LSB 12V , 12V IN OUT 12V – 12V , V IN ...
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LTC4245 ELECTRICAL CHARACTERISTICS range, otherwise specifi cations are 25° SYMBOL PARAMETER t Minimum Data Set-Up Time Input SU, DAT(MIN) t Minimum Data Hold Time Input HD, DATI(MIN) t Minimum Data Hold Time Output HD, DATO(MIN) ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS ADC INL vs Code (GPIO1 Pin) 0.5 0.25 0 –0.25 –0.5 128 192 0 64 CODE 4245 G01 12V and –12V Circuit Breaker Trip Voltage vs Temperature 50.25 50.00 –12V 49.75 12V 49.50 ...
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LTC4245 W U TYPICAL PERFOR A CE CHARACTERISTICS INTV Voltage vs Load Current CAUTION: DRAWING CURRENT FROM INTV INCREASES POWER 1 CC DISSIPATION AND T . LIMIT DC LOAD J CURRENT TO 3mA 0 ...
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CTIO S 12V : Gate Drive for 12V Supply External N-Channel GATE MOSFET. An internal 20μA current source charges the gate of the external N-channel MOSFET. An internal clamp limits the gate voltage to 6.2V ...
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LTC4245 CTIO Gate Drive Return; Foldback, ADC and Power OUT Bad Input. Connect this pin to the source of the 5V supply external N-channel MOSFET switch for gate drive return. Power ...
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CTIO S PCI_RST#: Reset Input. Pulling this pin low causes LO- CAL_PCI_RST# to pull low. When high, LOCAL_PCI_RST# is the logical inverse of HEALTHY#. Tie to INTV unused. PGI: Power Good Input. Tie this pin ...
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LTC4245 W BLOCK DIAGRA 12V OUT CHARGE PUMP GATE DRIVER 12V IN 5.5V INTV CC D[4] GEN 25mV ECB + – 5V SENSE RAMP 5 + – HI 40mV RAMP 5 LO: 75mV HI: 15mV ...
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U OPERATIO Start-Up The LTC4245 is designed to turn a board’s supply voltages on and off in a controlled manner, allowing the board to be safely inserted or removed from a live backplane slot. When a supply turn-on command is ...
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LTC4245 U U APPLICATIO S I FOR ATIO 4245fa ...
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U U APPLICATIO S I FOR ATIO The typical LTC4245 application high availability sys- tem where boards using multiple supplies are hot plugged. The device enables the system to periodically monitor board power consumption and fault status ...
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LTC4245 U U APPLICATIO S I FOR ATIO When a switch turned on, an internal 100μA cur- rent source is connected to the TIMER pin and a 20μA current to SS pin. The gate of each ramping ...
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U U APPLICATIO S I FOR ATIO BD_SEL# 5V/DIV 12V , 5V OUT OUT 10V/DIV OUT EEOUT HEALTHY# 5V/DIV LOCAL_PCI_RST# 5V/DIV TIME 100ms/DIV Figure 4. Normal Turn-Off Waveform Turn-Off The switches can be turned off by ...
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LTC4245 U U APPLICATIO S I FOR ATIO When the sequence bit C6 is set, setting the On control 2 bit of a supply, through the I C interface, starts the supply turn-on sequence from that supply onwards. For example, ...
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U U APPLICATIO S I FOR ATIO After the switches are turned off, the TIMER pin begins charging up with a 2μA pull-up current. When it reaches 2.56V it is reset to ground with a switch. During this cool- down ...
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LTC4245 U U APPLICATIO S I FOR ATIO Power Bad Fault A power bad condition exists when any supply output drops below its power bad threshold for more than 15μs (17μs for V ). This sets bit A2 in the ...
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U U APPLICATIO S I FOR ATIO Resetting Faults The two fault registers E and F can be reset in any of the following ways: 1. Writing zeros to the registers using the I 2. Taking the ON pin high ...
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LTC4245 U U APPLICATIO S I FOR ATIO Q5. The CPCI specifi cation assumes that there is a diode to 3.3V on the circuit that is driving the BD_SEL# pin. If the BD_SEL# pin is being driven high, the actual ...
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U U APPLICATIO S I FOR ATIO SDA SCL START ADDRESS CONDITION S Figure 13. LTC4245 Serial Bus SDA Write Word Protocol S ADDRESS 0 1 a4:a0 S ADDRESS 0 1 a4:a0 Figure ...
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LTC4245 U U APPLICATIO S I FOR ATIO SDA line during the acknowledge clock pulse. When the slave is the receiver, it must pull down the SDA line so that it remains LOW during this pulse to acknowledge receipt of ...
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U U APPLICATIO S I FOR ATIO toggles, bit F7 is set to indicate a change of state. If the GPIO1 alert bit B7 is enabled, this feature can be used to alert the host system to a change in ...
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LTC4245 U U APPLICATIO S I FOR ATIO Table 2. Sense Resistance Values SUPPLY R (1%) I SENSE TRIP(MIN) 12V 50mΩ 891mA 5V 3.5mΩ 6.4A 3.3V 2.5mΩ 8.9A –12V 100mΩ 396mA If necessary, two resistors with the same tolerance can ...
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U U APPLICATIO S I FOR ATIO The inputs to the above equations are pre-calculated in Table 3. Table 3. t Calculation Inputs 3 SUPPLY V V (dI/dt) OUT FB (MIN) 12V 12V 6V 60mA/ 430mA/ms 3.3V ...
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LTC4245 U U APPLICATIO S I FOR ATIO PCB Layout Considerations For proper operation of the LTC4245’s circuit breaker, Kelvin connection to the sense resistors is strongly recommended. The PCB layout should be balanced and symmetrical to minimize wiring errors. ...
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U U APPLICATIO S I FOR ATIO 2 Table 5. LTC4245 I C Device Addressing HEX DEVICE DESCRIPTION ADDRESS H Mass Write 2E Alert Response ...
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LTC4245 U U APPLICATIO S I FOR ATIO Table 6. LTC4245 Register Address and Contents REGISTER ADDRESS* REGISTER NAME DECIMAL HEX 0, 8 00h, 08h STATUS ( 01h, 09h ALERT ( 02h, 0Ah CONTROL (C) 3, ...
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U U APPLICATIO S I FOR ATIO Table 8. ALERT Register B (01h) – Read/Write BIT NAME B7 GPIO1 State Change Alert B6 BD_SEL# State Change Alert B5 FET Short Alert B4 PGI Fault Alert B3 Alert Present B2 Power ...
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LTC4245 U U APPLICATIO S I FOR ATIO Table 11. FAULT1 Register E (04h) – Read/Write BIT NAME E7 –12V Overcurrent Fault Occurred E6 3.3V Overcurrent Fault Occurred E5 5V Overcurrent Fault Occurred E4 12V Overcurrent Fault Occurred E3 –12V ...
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U U APPLICATIO S I FOR ATIO Table 14. ADCADR Register H (07h) – Read/Write BIT NAME H7:4 Reserved H3:0 ADC Channel Address Table 15. ADC Data Registers (10h to 1Fh) – Read/Write BIT NAME I7:0 12V ...
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LTC4245 PACKAGE DESCRIPTIO 7.8 – 8.2 0.42 ±0.03 RECOMMENDED SOLDER PAD LAYOUT 5.00 – 5.60** (.197 – .221) 0.09 – 0.25 0.55 – 0.95 (.0035 – .010) (.022 – .037) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN ...
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... DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. U UHF Package 38-Lead Plastic QFN (5mm × ...
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... V OUT 3.3V 3A IRF7413 AUX OUTPUT 3.3V 375mA 10Ω 5V GATE 5V OUT A/D INPUT GPI01 GPI02 GPI03 V EEIN V EESENSE V EEGATE V EEOUT PRECHARGE PRST#1 N/C BACKPLANE CARD CONNECTOR CONNECTOR 4245 TA02 0406 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2006 4245fa ...