LTC4245CUHF#PBF Linear Technology, LTC4245CUHF#PBF Datasheet - Page 18

• Manufacturer Part Number: LTC4245CUHF#PBF
• Description: IC CNTRLR HOT SWAP 38-QFN
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LTC4245CUHF#PBF

• Applications: CompactPCI™
• Internal Switch(s): No
• Voltage - Supply: 3.3V, 5V, 12V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 38-WFQFN, Exposed Pad
• Family Name: LTC4245
• Package Type: QFN EP
• Operating Supply Voltage (min): 2.25/4.25/10.2/-10.2V
• Operating Supply Voltage (max): 0/10/20/-20V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Product Depth (mm): 5mm
• Product Length (mm): 7mm
• Mounting: Surface Mount
• Pin Count: 38
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
LTC4245
When the sequence bit C6 is set, setting the On control
bit of a supply, through the I
turn-on sequence from that supply onwards. For example,
setting bit D1 will turn-on 5V, 3.3V, –12V supplies, in that
order. A logic one can then be written to bit D0 to ramp
the 12V supply. At the end of this ramp-up, bit D1 is set.
But since 5V is already powered-up, the sequence stops
there.
The I
supplies on and off. With bit C6 cleared, any supply or
supplies can be turned on by setting their On control
bits. The On control bits cannot be set when any supply
is ramping (therefore using TIMER and SS pins). The SS
busy bit, A1, indicates this blanking period. The On control
bits can be reset though, even when a supply is ramping.
Two or more On control bits may be set at the same time
to ramp multiple supplies in the same timing cycle. When
all supplies are turned on the LTC4245 goes through the
PGI timing cycle.
Supply Voltage Confi guration
The CFG pin enables the LTC4245 to be used in non-CPCI
applications. It is a three-state input pin. In a CPCI applica-
tion with all four supplies, the CFG pin is tied to ground.
Floating the CFG pin disables the V
(UVLO), start-up foldback and power bad functions. It also
makes the ±12V turn-ons coincident by using the 12V FET
On control bit, D0, to control the –12V supply MOSFET.
This allows the three positive supplies to power-up and
HEALTHY# to assert, even when a negative supply is
either unavailable or does not meet the required thresh-
olds. If unused the V
pins should be tied to ground. Since the circuit breaker
and active current limit circuits are not disabled, a lower
negative supply could be hot plugged. It would turn on
whenever the 12V supply turns on. Care should be taken
that the supply does not collapse under overcurrent con-
ditions. At low supplies, the ECB and ACL circuits stop
functioning. With the UVLO already disabled, the LTC4245
may not detect a fault condition on the V
currents, limited only by MOSFET and sense resistances,
could fl ow, potentially damaging the board traces and
connector pins.
18
2
C interface provides the most fl exibility in turning
U
EEIN
, V
U
2
EESENSE
C interface, starts the supply
EE
W
, V
undervoltage lockout
EEGATE
EE
supply. Large
and V
U
EEOUT
If the CFG pin is tied high, the 5V supply thresholds change
to 3.3V levels, while keeping the fl oating state functionality.
The 5V supply UVLO, power bad thresholds and foldback
profi le become similar to those of the 3.3V supply. The
5V
full-scale as the 3V
of an extra 3.3V supply instead of a 5V supply as in a PCI
Express application.
Overcurrent Fault
The LTC4245 has different current limiting behavior dur-
ing start-up, when supply ramps up under TIMER and SS
control, and normal operation. As such it can generate an
overcurrent fault during both phases of operation. Both
set the faulting supply’s overcurrent fault bit (bits E4 to
E7) and shut off all external FETs.
During start-up when both TIMER and SS are ramping,
the current limit is a function of SS pin voltage and the
ramping supplies’ output voltages. A supply could power
up entirely in current limit depending on the bypass ca-
pacitor at the outputs of the ramping supplies. The TIMER
pin sets the time duration for current limit during start-up.
This time involves the TIMER charging up to 2.56V with a
100μA current source and then resetting to 0.23V with a
switch. At the end of the timing cycle if the supply is still
in current limit, i.e., the gate of it’s external MOSFET is still
being actively controlled, an overcurrent fault is declared
for that supply and all MOSFETs are shut off (Figure 6).
Therefore the maximum time a supply can stay in current
limit at start-up is given by:
IN
t
START
and 5V
CURRENT 2.5A/DIV
3V
TIMER 2.5V/DIV
Figure 6. Start-Up Into a Short on 3.3V Output
3V
12V
GATE
3.3V SUPPLY
=
OUT
SS 2.5V/DIV
OUT
HEALTHY#
OUT
ON 5V/DIV
C
, V
2.5V/DIV
10V/DIV
, 5V
T
5V/DIV
EEOUT
•
inputs to the ADC use the same LSB and
OUT
K
,
TMCAP
IN
and 3V
=
C
OUT
T
TIME 10ms/DIV
•
23 3
pins. This allows the use
.
⎡ ⎣
ms
/
µ
F
4245 F06
⎤ ⎦
4245fa
(4)