DS1874T+ Maxim Integrated Products, DS1874T+ Datasheet - Page 15

• Manufacturer Part Number: DS1874T+
• Description: IC CTLR SFP+ ANLG LDD 28-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Laser Diode Controllerr

Specifications of DS1874T+

• Number Of Channels: 1
• Voltage - Supply: 2.85 V ~ 3.9 V
• Current - Supply: 2.5mA
• Operating Temperature: -40°C ~ 95°C
• Package / Case: 28-WFQFN Exposed Pad
• Mounting Type: Surface Mount
• Number Of Outputs: 5
• Duty Cycle (max): 50 %
• Output Voltage: 0 V to 3.9 V
• Mounting Style: SMD/SMT
• Switching Frequency: 0 KHz to 400 KHz
• Operating Supply Voltage: 2.85 V to 3.9 V
• Supply Current: 2.5 mA to 10 mA
• Maximum Operating Temperature: + 95 C
• Fall Time: 300 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 300 ns
• Synchronous Pin: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-1874T+000

If TXD is asserted (logic 1) during normal operation, the
outputs are disabled within t
ed (logic 0), the DS1874 sets the MODULATION regis-
ter with the value associated with the present
temperature, and initializes the BIAS register using the
same search algorithm as done at startup. When
asserted, soft TXD (TXDC) (Lower Memory, Register
6Eh) would allow a software control identical to the TXD
pin (see Figure 3).
As shown in Figure 4, the DS1874’s input comparator is
shared between the APC control loop and the quick-
trip alarms (TXP HI, TXP LO, LOS, and BIAS HI). The
comparator polls the alarms in a multiplexed sequence.
Five of every eight comparator readings are used for
APC loop bias-current control. The other three updates
are used to check the HTXP/LTXP (monitor diode volt-
age), the HBATH (MON1), and LOS (MON3) signals
against the internal APC, BIAS, and MON3 reference,
respectively. If the last APC comparison was higher
than the APC set point, it makes an HTXP comparison,
and if it is lower, it makes an LTXP comparison.
Depending on the results of the comparison, the corre-
sponding alarms and warnings (TXP HI, TXP LO) are
asserted or deasserted.
The DS1874 has a programmable comparator sample
time based on an internally generated clock to facilitate
Figure 3. TXD Timing
Figure 4. APC Loop and Quick-Trip Sample Timing
BIAS and MODULATION Registers as a
APC QUICK-TRIP SAMPLE TIMES
Function of Transmit Disable (TXD)
SFP+ Controller with Digital LDD Interface
______________________________________________________________________________________
APC and Quick-Trip Timing
MODULATION REGISTER
OFF
SAMPLE
HBIAS
. When TXD is deassert-
BIAS REGISTER
SAMPLE
TXD
APC
t
REP
SAMPLE
APC
t
t
OFF
OFF
SAMPLE
APC
a wide variety of external filtering options and time
delays resulting from writing values to the MAX3798/
MAX3799’s bias DAC. The UPDATE RATE register
(Table 02h, Register 88h) determines the sampling
time. Samples occur at a regular interval, t
shows the sample rate options available. Any quick-trip
alarm that is detected by default remains active until a
subsequent comparator sample shows the condition no
longer exists. A second bias current monitor (BIAS
MAX) compares the MAX3798/MAX3799’s BIAS DAC’s
code to a digital value stored in the IBIASMAX register.
This comparison is made at every bias current update
to ensure that a high-bias current is quickly detected.
An APC sample that requires an update of the BIAS
register causes subsequent APC samples to be
Table 2. Update Rate Timing
SAMPLE
APC
t
t
ON
ON
APC_SR[2:0]
SAMPLE
APC
000b
001b
010b
011b
100b
101b
110b
111b
HTXP/LTXP
SAMPLE
SAMPLE
LOS
SAMPLE PERIOD (t REP )
SAMPLE
HBIAS
1200
1600
2000
2800
3200
4400
6400
(ns)
800
REP
SAMPLE
APC
. Table 2
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