DS1874T+ Maxim Integrated Products, DS1874T+ Datasheet - Page 19

• Manufacturer Part Number: DS1874T+
• Description: IC CTLR SFP+ ANLG LDD 28-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Laser Diode Controllerr

Specifications of DS1874T+

• Number Of Channels: 1
• Voltage - Supply: 2.85 V ~ 3.9 V
• Current - Supply: 2.5mA
• Operating Temperature: -40°C ~ 95°C
• Package / Case: 28-WFQFN Exposed Pad
• Mounting Type: Surface Mount
• Number Of Outputs: 5
• Duty Cycle (max): 50 %
• Output Voltage: 0 V to 3.9 V
• Mounting Style: SMD/SMT
• Switching Frequency: 0 KHz to 400 KHz
• Operating Supply Voltage: 2.85 V to 3.9 V
• Supply Current: 2.5 mA to 10 mA
• Maximum Operating Temperature: + 95 C
• Fall Time: 300 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 300 ns
• Synchronous Pin: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-1874T+000

The DS1874 contains two power-on reset (POR) levels.
The lower level is a digital POR (POD) and the higher
level is an analog POR (POA). At startup, before the
supply voltage rises above POA, the outputs are dis-
abled, all SRAM locations are set to their defaults,
shadowed EEPROM (SEE) locations are zero, and all
analog circuitry is disabled. When V
the SEE is recalled, and the analog circuitry is enabled.
While V
mal operating state, and it responds based on its non-
volatile configuration. If during operation V
below POA, but is still above POD, then the SRAM
retains the SEE settings from the first SEE recall, but the
device analog is shut down and the outputs disabled. If
the supply voltage recovers back above POA, then the
device immediately resumes normal operation. If the
supply voltage falls below POD, then the device SRAM
is placed in its default state and another SEE recall is
required to reload the nonvolatile settings. The EEPROM
recall occurs the next time V
shows the sequence of events as the voltage varies.
Any time V
used to determine if V
accomplished by checking the RDYB bit in the STATUS
(Lower Memory, Register 6Eh) byte. RDYB is set when
V
Figure 8. Low-Voltage Hysteresis Example
CC
V
SEE
CC
V
V
POA
POD
is below POA; when V
PRECHARGED
CC
TO 0
SEE RECALL
remains above POA, the device is in its nor-
CC
SFP+ Controller with Digital LDD Interface
is above POD, the I
______________________________________________________________________________________
CC
RECALLED VALUE
is below the POA level. This is
Low-Voltage Operation
CC
CC
rises above POA, RDYB
exceeds POA. Figure 8
2
C interface can be
CC
reaches POA,
PRECHARGED TO 0
CC
SEE RECALL
falls
is timed (within 500µs) to go to 0, at which point the
part is fully functional.
For all device addresses sourced from EEPROM (Table
02h, Register 8Ch), the default device address is A2h
until V
be recalled from the EEPROM.
POA holds the DS1874 in reset until V
level (V
with its ADC and compare analog signals with its quick-
trip monitors. Because V
ADC when V
VCC LO alarm, which is cleared by a V
sion greater than the customer-programmable V
alarm low ADC limit. This allows a programmable limit
to ensure that the headroom requirements of the trans-
ceiver are satisfied during a slow power-up. The TXF
output does not latch until there is a conversion above
V
output is asserted when V
Low-Voltage Operation section for more information.
Two delta-sigma outputs are provided, DAC1 and
DAC2. With the addition of an external RC filter, these
outputs provide two 9-bit resolution analog outputs with
the full-scale range set by the input REFIN. Each output
CC
low limit. The POA alarm is nonmaskable. The TXF
Delta-Sigma Outputs (DAC1 and DAC2)
CC
CC
exceeds POA, allowing the device address to
> POA) for the device to accurately measure
CC
RECALLED VALUE
is less than POA, POA also asserts the
CC
Power-On Analog (POA)
CC
cannot be measured by the
is below POA. See the
CC
CC
is at a suitable
ADC conver-
PRECHARGED
TO 0
CC
19