DS1874T+ Maxim Integrated Products, DS1874T+ Datasheet - Page 30

IC CTLR SFP+ ANLG LDD 28-TQFN

DS1874T+

Manufacturer Part Number
DS1874T+
Description
IC CTLR SFP+ ANLG LDD 28-TQFN
Manufacturer
Maxim Integrated Products
Type
Laser Diode Controllerr
Datasheet

Specifications of DS1874T+

Number Of Channels
1
Voltage - Supply
2.85 V ~ 3.9 V
Current - Supply
2.5mA
Operating Temperature
-40°C ~ 95°C
Package / Case
28-WFQFN Exposed Pad
Mounting Type
Surface Mount
Number Of Outputs
5
Duty Cycle (max)
50 %
Output Voltage
0 V to 3.9 V
Mounting Style
SMD/SMT
Switching Frequency
0 KHz to 400 KHz
Operating Supply Voltage
2.85 V to 3.9 V
Supply Current
2.5 mA to 10 mA
Maximum Operating Temperature
+ 95 C
Fall Time
300 ns
Minimum Operating Temperature
- 40 C
Rise Time
300 ns
Synchronous Pin
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
90-1874T+000
SFP+ Controller with Digital LDD Interface
The register maps show each byte/word (2 bytes) in terms of its row in the memory. The first byte in the row is locat-
ed in memory at the row address (hexadecimal) in the leftmost column. Each subsequent byte on the row is one/two
memory locations beyond the previous byte/word’s address. A total of 8 bytes are present on each row. For more
information about each of these bytes see the corresponding register description.
30
30–5F
Read
Access
Write
Access
ROW
(hex)
ACCESS
00
08
10
18
20
28
60
68
70
78
CODE
______________________________________________________________________________________
<1>
<1>
<1>
<1>
<1>
<1>
ROW NAME
<1>
<2>
<0>
THRESHOLD
THRESHOLD
THRESHOLD
THRESHOLD
THRESHOLD
THRESHOLD
VALUES
VALUES
<2>
<0>
SELECT
separately
WARN
See each
EEPROM
ALARM/
bit/byte
TABLE
ADC
ADC
<0>
0
1
0
1
2
3
4
5
PW2
<1>
BYTE 0/8
ALARM
All
MON1 ALARM HI
MON2 ALARM HI
MON3 ALARM HI
MON4 ALARM HI
<2>
TEMP ALARM HI
EE
V
<2>
TEMP VALUE
CC
MON3 VALUE
WORD 0
RESERVED
3
ALARM HI
<2>
N/A
All
BYTE 1/9
ALARM
hardware
EE
DS1874
All and
<3>
All
2
RESERVED
BYTE 2/A
ALARM
PW2 +
mode
LOWER MEMORY
MON1 ALARM LO
MON2 ALARM LO
MON3 ALARM LO
MON4 ALARM LO
PW2
TEMP ALARM LO
<4>
<2>
<2>
bit
V
EE
CC
V
MON4 VALUE
WORD 1
CC
ALARM LO
1
VALUE
<5>
BYTE 3/B
All
All
ALARM
EE
<6>
PWE MSW
0
<6>
N/A
All
BYTE 4/C
WARN
MON1 WARN HI
MON2 WARN HI
MON3 WARN HI
MON4 WARN HI
TEMP WARN HI
EE
<2>
MON1 VALUE
V
PW1
PW1
<7>
CC
WORD 2
3
RESERVED
Lower Memory Register Map
WARN HI
Register Descriptions
BYTE 5/D
WARN
PW2
PW2
<8>
EE
<6>
2
PWE LSW
PW2
<9>
N/A
<0>
BYTE 6/E
STATUS
MON1 WARN LO
MON2 WARN LO
MON3 WARN LO
MON4 WARN LO
TEMP WARN LO
EE
V
MON2 VALUE
CC
RESERVED
WORD 3
<10>
PW2
N/A
WARN LO
<3>
BYTE 7/F
<5>
UPDATE
SEL
EE
<11>
PW1
TBL
All

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