C8051F350DK Silicon Laboratories Inc, C8051F350DK Datasheet - Page 139

• Manufacturer Part Number: C8051F350DK
• Description: DEV KIT FOR F350/351/352/353
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F350DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F35x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F350
• Silicon Family Name: C8051F35x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F350, 351, 352, 353
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1083

18.1. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 18.3) assigns a priority to each I/O function, starting at the top with
UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that
resource (excluding UART0, which will be assigned to pins P0.4 and P0.5, and the Comparator0 outputs,
which will be assigned to P1.4 and P1.5). If a Port pin is assigned, the Crossbar skips that pin when
assigning the next selected resource. Additionally, the Crossbar will skip Port pins whose associated bits in
the PnSKIP registers are set. The PnSKIP registers allow software to skip Port pins that are to be used for
analog input, dedicated functions, or GPIO.
Important Note on Crossbar Configuration: If a Port pin is claimed by a peripheral without use of the
Crossbar, its corresponding PnSKIP bit should be set. This applies to P0.3 and/or P0.2 for the external
oscillator, P0.6 for the external CNVSTR signal, P1.6 for IDA0, P1.7 for IDA1, and any selected ADC or
comparator inputs. The Crossbar skips selected pins as if they were already assigned, and moves to the
next unassigned pin. Figure 18.3 shows the Crossbar Decoder priority with no Port pins skipped (P0SKIP,
P1SKIP = 0x00); Figure 18.4 shows the Crossbar Decoder priority with the XTAL1 (P0.2) and XTAL2
(P0.3) pins skipped (P0SKIP = 0x0C).
SF Signals
PIN I/O
TX0
RX0
CP0A
CP0
SCK
MISO
MOSI
NSS*
SDA
SCL
/SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
SF Signals
Figure 18.3. Crossbar Priority Decoder with No Pins Skipped
Port pin potentially assignable to peripheral
Special Function Signals are not assigned by the crossbar.
When these signals are enabled, the CrossBar must be
manually configured to skip their corresponding port pins.
0
0
1
0
x1
2
0
P0SKIP[0:7]
x2
3
0
P0
(*4-Wire SPI Only)
4
0
5
0
CNVSTR
Rev. 1.1
6
0
7
0
0
0
1
0
2
0
P1SKIP[0:7]
C8051F350/1/2/3
3
0
P1
4
0
5
0
IDA0 IDA1
6
0
7
0
P2
0
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