C8051F350DK Silicon Laboratories Inc, C8051F350DK Datasheet - Page 73

DEV KIT FOR F350/351/352/353

C8051F350DK

Manufacturer Part Number
C8051F350DK
Description
DEV KIT FOR F350/351/352/353
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F350DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F35x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F350
Silicon Family Name
C8051F35x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F350, 351, 352, 353
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1083

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7.
There are two voltage reference options for the C8051F350/1/2/3 ADCs: the internal 2.5 V reference volt-
age, or an external reference voltage (see Figure 7.1). The AD0VREF bit in the ADC0CF register selects
the reference source.
The internal voltage reference circuit consists of a 1.25 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier, to produce a 2.5 V voltage reference. When the inter-
nal voltage reference is used, it is driven out on the VREF+ pin. In this configuration, the VREF– must be
connected to the AGND pin external to the device. See Section “24. Revision Specific Behavior’ on
page 227 for more information. The internal voltage reference is enabled by setting the AD0EN bit in regis-
ter ADC0MD to ‘1’ and clearing the AD0VREF bit in register ADC0CF to ‘0’ (See Section “5. 24 or 16-Bit
Analog to Digital Converter (ADC0)’ on page 41). Electrical specifications for the internal voltage reference
and bias generators are given in Table 7.1.
The internal oscillator bias generator is automatically enabled whenever the internal oscillator is enabled.
For power requirement characterization, the BIASE bit in register REF0CN can also be used to enable the
internal oscillator bias generator, when the oscillator itself is not enabled. Likewise, the REFBE bit in regis-
ter REF0CN can be used to enable the internal bandgap generator, which is used by the ADC, the IDACs,
the Clock Multiplier, and the internal Voltage Reference. The internal reference bias generator is automati-
cally enabled whenever a peripheral requires it. See SFR Definition 7.1 for the REF0CN register descrip-
tion.
Reference
(Optional)
External
Voltage
Voltage Reference
(Recommended)
Capacitors
Bypass
+
Figure 7.1. Reference Circuitry Block Diagram
VREF+
VREF–
REFBE
BIASE
AD0VREF
AD0EN
IOSCEN
IDA0EN
IDA1EN
MULEN
AD0EN
Rev. 1.1
VREF to ADC
EN
EN
C8051F350/1/2/3
EN
Bias Generator
Oscillator Bias
Generator
Reference
Reference
Internal
Internal
Buffer
2.5 V
To Internal
Oscillator
To ADC, IDACs,
Clock Multiplier
73

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