C8051F530-TB Silicon Laboratories Inc, C8051F530-TB Datasheet - Page 137
C8051F530-TB
Manufacturer Part Number
C8051F530-TB
Description
BOARD PROTOTYPE W/C8051F530
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F530-TB.pdf
(218 pages)
Specifications of C8051F530-TB
Contents
Board
Processor To Be Evaluated
C8051F52xA and C8051F53xA
Interface Type
USB
Lead Free Status / RoHS Status
Vendor undefined / Vendor undefined
For Use With/related Products
C8051F530
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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SFR Definition 14.2. OSCICL: Internal Oscillator Calibration
SFR Definition 14.3. OSCIFIN: Internal Fine Oscillator Calibration
Bit7:
Bits6–0: OSCICL: Internal Oscillator Calibration Register.
Bits7–6: UNUSED. Read = 00b, Write = don't care.
Bits5–0: OSCIFIN. Internal oscillator fine adjustment bits.
R/W
Bit7
—
Bit7
—
R
UNUSED. Read = 0b. Write = don’t care.
This register determines the internal oscillator period. On C8051F52x/53x devices, the reset
value is factory calibrated to generate an internal oscillator frequency of 24.5 MHz.
The valid range is between 0x00 and 0x27.
This register is a fine adjustment for the internal oscillator period. On
C8051F52x/52xA/53x/53xA devices, the reset value is factory calibrated to generate an
R/W
Bit6
—
R/W
Bit6
R/W
Bit5
R/W
Bit5
Bit4
R/W
Bit4
R
C8051F52x/F52xA/F53x/F53xA
OSCICL
Rev. 1.3
Bit3
R/W
Bit3
R
OSCIFIN
R/W
Bit2
R/W
Bit2
R/W
Bit1
R/W
Bit1
SFR Address:
SFR Address:
R/W
Bit0
R/W
Bit0
undetermined
Bit Addressable
Reset Value
Reset Value
Varies
0xB0
0xB3
137
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