C8051F530-TB Silicon Laboratories Inc, C8051F530-TB Datasheet - Page 171
C8051F530-TB
Manufacturer Part Number
C8051F530-TB
Description
BOARD PROTOTYPE W/C8051F530
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F530-TB.pdf
(218 pages)
Specifications of C8051F530-TB
Contents
Board
Processor To Be Evaluated
C8051F52xA and C8051F53xA
Interface Type
USB
Lead Free Status / RoHS Status
Vendor undefined / Vendor undefined
For Use With/related Products
C8051F530
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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17.7. LIN Registers
The following Special Function Registers (SFRs) are available:
17.7.1. LIN Direct Access SFR Registers Definition
SFR Definition 17.1. LINADDR: Indirect Address Register
SFR Definition 17.2. LINDATA: LIN Data Register
Bit7–0:
Bit7–0:
R/W
R/W
Bit7
Bit7
LINADDR7-0: LIN Indirect Address Register Bits.
This register hold an 8-bit address used to indirectly access the LIN0 core registers.
Table 17.4 lists the LIN0 core registers and their indirect addresses. Reads and writes to
LINDATA will target the register indicated by the LINADDR bits.
LINDATA7-0: LIN Indirect Data Register Bits.
When this register is read, it will read the contents of the LIN0 core register pointed to by
LINADDR.
When this register is written, it will write the value to the LIN0 core register pointed to by LIN-
ADDR.
R/W
R/W
Bit6
Bit6
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
C8051F52x/F52xA/F53x/F53xA
Rev. 1.3
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
R/W
R/W
Bit0
Bit0
00000000
00000000
Reset Value
Reset Value
0x92
0x93
171
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