MPC8272ADS Freescale Semiconductor, MPC8272ADS Datasheet - Page 78

• Manufacturer Part Number: MPC8272ADS
• Description: KIT DEVELOPMENT MPC8272
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8272ADS

• Contents: Board
• For Use With/related Products: MPC8272
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

COP/JTAG Port
additional signals aiding in system debug. The pinout of this connector, which is a general
Motorola recommendation for including a COP/JTAG port in a design, is shown in
Figure 5-11 and detailed in Table 5-20.
Pin No.
1
2
3
4
5
6
7
8
Signal Name
QREQ
TRST
TDO
V3.3
N.C.
TCK
N.C.
TDI
Table 5-20. COP/JTAG Port Signals Description
Figure 5-11. COP/JTAG Port Connector
CKSTP_OUT
Attribute
SRESET
HRESET
O
O
O
-
I
I
I
-
MPC8272ADS User Guide
QREQ
TMS
TCK
TDO
TDI
Transmit Data Out. This the JTAG’s serial data output driven by
Falling edge of TCK.
Not Connected.
Transmit Data In. This is the JTAG serial data input, sampled by
the PowerQUICC II on the rising edge of TCK. This line is pulled
up internally by the PowerQUICC II.
Test port Reset (L). When this signal is active (Low), it resets the
JTAG logic. This line is pull-down on the MPC8272ADS with a
1KΩ resistor, to provide constant reset of the JTAG logic.
Quiescent Request (L). When asserted (low), this line indicates
that the PowerQUICC II desires to enter low-power mode. This
signal may be required by a debug station.
3.3V power supply bus.
Test port Clock. This clock shifts in / out data to / from the
PowerQUICC II JTAG port. Data is driven on the falling edge of
TCK and is sampled both internally and externally on it’s rising
edge.
TCK is pulled up internally by the PowerQUICC II.
Not Connected.
11
13
15
3
5
7
9
1
14
4
8
12
16
2
6
10
N.C.
TRST
V3.3
N.C.
N.C.
GND
"KEY"
GND
Description