MPC8272ADS Freescale Semiconductor, MPC8272ADS Datasheet - Page 81

• Manufacturer Part Number: MPC8272ADS
• Description: KIT DEVELOPMENT MPC8272
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8272ADS

• Contents: Board
• For Use With/related Products: MPC8272
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 6
Memory Map
This chapter explains memory mapping in the MPC8272ADS.
6.1
All accesses to MPC8272ADS memory slaves are controlled by the MPC8272 memory
controller. Therefore, the memory map is reprogrammable to suit the user. After the debug
station performs hard reset, the debugger checks for existence, size, delay and type of the
Flash memory SIMM mounted on board, decides the assignments of CS0 and CS4
(E
E
/ supervisory, program / data, and DMA).
This memory map is a recommended memory map, and because it is a 'soft' map, devices’
addresses may be moved about the map for user convenience. Two memory maps depend
on the device assigned to CS0 (regardless of the hard reset configuration word source). The
memory address for the device assigned to CS0 is always the same as determined in the
hard-reset configuration word. Because Flash and E
spaces, different memory maps are devised for each case. For details, see Table 6-1 and
Table 6-2.
2
00000000 -
03FFFFFF
04000000 -
044FFFFF
Address
2
PROM, and Flash memory respond to all types of memory access (for example, problem
Range
PROM and Flash), and programs the memory controller accordingly. The SDRAM,
Table 6-1. MPC8272ADS Memory Map
Overview
Empty space
60x SDRAM
Memory
Type
64 MByte
Optional 4MByte local bus SDRAM for legacy
support
Chapter 6. Memory Map
Device Name
64 MByte
—
Flash (or BCSR) as Boot Device
2
PROM require different memory
Port
Size
64
—
Memory
64 MBytes
5 MBytes
Size