MPC8272ADS Freescale Semiconductor, MPC8272ADS Datasheet - Page 86
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MPC8272ADS
Manufacturer Part Number
MPC8272ADS
Description
KIT DEVELOPMENT MPC8272
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheet
1.MPC8272ADS.pdf
(158 pages)
Specifications of MPC8272ADS
Contents
Board
For Use With/related Products
MPC8272
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1
PowerQUICC II Register Programming
The internal registers of the MPC8272 must be programmed after hard reset as described
in the following sections. The addresses and programming values are in hexadecimal base.
For more information about the this topic in the following sections of this chapter, see the
MPC8272 PowerQUICC II
6.2.1
The power-on reset configuration word is set in the BCSR or Flash or in the E
There are two configuration words: one for the BCSR and Flash (when it is assigned to
CS0) and the other to the E
detailed in Table 6-3 and Table 6-4, respectively.
EEPROM
Programmed into the Flash (E
Address
Address
Flash
[hex]
[hex]
10
18
10
18
0
8
0
8
System Initialization
Value[hex]
Value[hex]
Table 6-3. BCSR/Flash Power On Reset Configuration
Init
Init
0C
5A
5A
72
36
04
72
36
Table 6-4. E
2
TM
PROM) memory in addresses 0x0, 0x8, 0x10 & 0x18
Internal arbitration, Internal memory controller, Core enabled, Single PowerQUICC
II, 32 Bit boot port size, Exceptions vectored to 0xFFFxxxxx, Internal space 64 bit
slave for external master.
IRQ signals configured as BADDRx lines, DP(1:7) configured as IRQ I/F and
IRQ(6:7),Initial internal space @ 0x0F000000
Boot memory space @ 0xFE000000 - 0xFFFFFFFF, ABB/IRQ2 pin is ABB,
DBB/IRQ3 pin is DBB, No masking on bus request lines, Local bus pins function as
PCI, PCI is boot master, AP(1;3) configured as BNKSEL(0:2), APE configured as
IRQ5.
CS10 configured as BCTL1
Internal arbitration, Internal memory controller, Core enabled, Single PowerQUICC
II (60X Bus mode
space 64 bit slave for external master.
IRQ signals configured as BADDRx lines, DP(1:7) configured as IRQ I/F and
IRQ(6:7),Initial internal space @ 0x0F000000
Boot memory space @ 0xFE000000 - 0xFFFFFFFF, ABB/IRQ2 pin is ABB,
DBB/IRQ3 pin is DBB, No masking on bus request lines, Local bus pins function as
PCI, PCI is boot master, AP(1;3) configured as BNKSEL(0:2), APE configured as
IRQ7 and CS11 as CS11.
CS10 configured as BCTL1
2
PROM
Family Reference Manual
2
PROM Power On Reset Configuration
MPC8272ADS User Guide
(
when it is assigned to CS0)
b
), 8 Bit Boot size, Exceptions vectored to 0xFFFxxxxx, Internal
.
Description
Description
.
The two configurations are
1
1
2
PROM
.
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