D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 221

IC H8/3002 ROMLESS 100QFP

D13002F16V

Manufacturer Part Number
D13002F16V
Description
IC H8/3002 ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of D13002F16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D13002F16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Figure 8-3 shows a sample setup procedure for I/O mode.
8.4.3 Idle Mode
Idle mode can be selected independently for each channel.
One byte or word is transferred at each transfer request in idle mode. A designated number of
these transfers are executed. One address is specified in the memory address register (MAR), the
other in the I/O address register (IOAR). The direction of transfer is determined automatically
from the activation source. The transfer is from the address specified in IOAR to the address
specified in MAR if activated by an SCI
address specified in MAR to the address specified in IOAR otherwise.
Table 8-7 indicates the register functions in idle mode.
destination addresses
Set transfer count
I/O mode setup
Set source and
Read DTCR
Set DTCR
I/O mode
Figure 8-3 I/O Mode Setup Procedure (Example)
1
2
3
4
channel 0
1.
2.
3.
4.
205
Set the source and destination addresses
in MAR and IOAR. The transfer direction is
determined automatically from the activation
source.
Set the transfer count in ETCR.
Read DTCR while the DTE bit is cleared to 0.
Set the DTCR bits as follows.
Select the DMAC activation source with bits
DTS2 to DTS0.
Set or clear the DTIE bit to enable or disable
the CPU interrupt at the end of the transfer.
Clear the RPE bit to 0 to select I/O mode.
Select MAR increment or decrement with the
DTID bit.
Select byte size or word size with the DTSZ bit.
Set the DTE bit to 1 to enable the transfer.
receive-data-full interrupt, and from the

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