D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 237

• Manufacturer Part Number: D13002F16V
• Description: IC H8/3002 ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13002F16V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

8.4.8 DMAC Bus Cycle
Figure 8-13 shows an example of the timing of the basic DMAC bus cycle. This example shows a
word-size transfer from a 16-bit two-state access area to an 8-bit three-state access area. When the
DMAC gets the bus from the CPU, after one dead cycle (T
writes to the destination address. During these read and write operations the bus is not released
even if there is another bus request. DMAC cycles comply with bus controller settings in the same
way as CPU cycles.
ø
Address
bus
RD
HWR
LWR
T
1
CPU cycle
T
2
Figure 8-13 DMA Transfer Bus Timing (Example)
T
1
T
2
T
d
T
Source
address
1
DMAC cycle (word transfer)
T
2
221
T
1
T
Destination address
2
T
d
3
), it reads from the source address and
T
1
T
2
T
3
T
1
T
CPU cycle
2
T
1
T
2