M38D59GCHP#U0 Renesas Electronics America, M38D59GCHP#U0 Datasheet - Page 32

IC 740/38D5 MCU QZ-ROM 80LQFP

M38D59GCHP#U0

Manufacturer Part Number
M38D59GCHP#U0
Description
IC 740/38D5 MCU QZ-ROM 80LQFP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M38D59GCHP#U0

Core Processor
740
Core Size
8-Bit
Speed
12.5MHz
Connectivity
SIO, UART/USART
Peripherals
LCD, LED, PWM, WDT
Number Of I /o
59
Program Memory Size
48KB (48K x 8)
Program Memory Type
QzROM
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M38D59GCHP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
38D5 Group
Rev.3.04
REJ03B0158-0304
Fig. 19 Structure of interrupt-related registers
b7
b7
b7
May 20, 2008 Page 30 of 134
b0
b0
b0
Interrupt control register 1
(ICON1 : address 003E
Interrupt edge selection register
(INTEDGE : address 003A
Interrupt request register 1
(IREQ1 : address 003C
INT
INT
INT
Key input interrupt enable bit
Timer X interrupt enable bit
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
INT
INT
INT
Timer Y/CNTR
0 : Timer Y interrupt
1 : CNTR
INT
0 : input from Port P6
1 : input from Port P7
INT
0 : input from Port P6
1 : input from Port P7
Not used (do not write to “1”)
Not used (return “0” when read)
INT
INT
INT
Key input interrupt request bit
Timer X interrupt request bit
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
0
1
2
0
1
2
0
1
0
1
2
interrupt enable bit
interrupt enable bit
interrupt enable bit
interrupt edge selection bit
interrupt request bit
interrupt edge selection bit
interrupt edge selection bit
input port switch bit
input port switch bit
interrupt request bit
interrupt request bit
1
interrupt
1
interrupt switch bit
2
0
6
1
16
16
(INT
(INT
(INT
(INT
)
)
16
00
01
10
11
)
)
)
)
)
0 : Falling edge active
1 : Rising edge active
b7
b7
b0
b0
Interrupt request register 2
(IREQ2 : address 003D
Interrupt control register 2
(ICON2 : address 003F
Timer 4 interrupt request bit
Serial I/O1 receive interrupt request bit
Serial I/O1 transmit interrupt request bit
Serial I/O2 receive/transmit interrupt request bit
CNTR
Timer Y interrupt request bit
CNTR
AD conversion interrupt request bit
Not used (returns “0” when read)
Timer 4 interrupt enable bit
Serial I/O1 receive interrupt enable bit
Serial I/O1 transmit interrupt enable bit
Serial I/O2 receive/transmit interrupt enable bit
CNTR
Timer Y interrupt enable bit
CNTR
AD conversion interrupt enable bit
Not used (do not write to “1”)
0 : Interrupts disabled
1 : Interrupts enabled
0 : No interrupt request issued
1 : Interrupt request issued
0
1
0
1
interrupt request bit
interrupt enable bit
interrupt enable bit
interrupt request bit
16
16
)
)

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