M38D59GCHP#U0 Renesas Electronics America, M38D59GCHP#U0 Datasheet - Page 77

• Manufacturer Part Number: M38D59GCHP#U0
• Description: IC 740/38D5 MCU QZ-ROM 80LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38D59GCHP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, LED, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

38D5 Group
Rev.3.04
REJ03B0158-0304
Boot Mode
The control program for CPU rewrite mode must be written into
the User ROM or Boot ROM area in parallel I/O mode
beforehand. (If the control program is written into the Boot ROM
area, the standard serial I/O mode becomes unusable.)
See Figure 70 for details about the Boot ROM area.
N o r m a l m i c r o c o m p u t e r m o d e i s e n t e r e d w h e n t h e
microcomputer is reset with pulling CNV
the CPU starts operating using the control program in the User
ROM area.
When the microcomputer is reset and the CNV
pulling the P4
operating (start address of program is stored into addresses
FFFC
ROM area. This mode is called the “Boot mode”. Also, User
ROM area can be rewritten using the control program in the Boot
ROM area.
Block Address
Block addresses refer to the maximum address of each block.
These addresses are used in the block erase command.
Fig 70. Block diagram of built-in flash memory
RAM
16
and FFFD
FFFF
0FE0
0FFF
0000
0040
083F
1000
May 20, 2008 Page 75 of 134
1
/TxD pin and CNV
16
16
16
16
16
16
16
16
Internal flash memory area
) using the control program in the Boot
Internal RAM area
(60K bytes)
(2K bytes)
SFR area
SFR area
SS
pin high, the CPU starts
SS
pin low. In this case,
SS
pin high after
FFFF
1000
1400
1800
8000
16
16
16
16
16
CPU Rewrite Mode
In CPU rewrite mode, the internal flash memory can be operated
on (read, program, or erase) under control of the Central
Processing Unit (CPU).
In CPU rewrite mode, only the User ROM area shown in Figure
70 can be rewritten; the Boot ROM area cannot be rewritten.
Make sure the program and block erase commands are issued for
only the User ROM area and each block area.
The control program for CPU rewrite mode can be stored in
either User ROM or Boot ROM area. In the CPU rewrite mode,
because the flash memory cannot be read from the CPU, the
rewrite control program must be transferred to internal RAM
area before it can be executed.
Block 0: 32 K bytes
Block 1: 26K bytes
User ROM area
Data block B:
Data block A:
1K bytes
1K bytes
Notes1: The boot ROM area can be rewritten
2: To specify a block, use the maximum
3: The QzROM version has the reserved
in a parallel I/O mode. (Access to
except boot ROM area is disabled.)
address in the block.
ROM area. Note the difference of the
area.
FFFF
F000
16
16
Boot ROM area
4K bytes