AT91SAM7SE256-AU Atmel, AT91SAM7SE256-AU Datasheet - Page 125

IC ARM7 MCU FLASH 256K 128-LQFP

AT91SAM7SE256-AU

Manufacturer Part Number
AT91SAM7SE256-AU
Description
IC ARM7 MCU FLASH 256K 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7SE256-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
88
Number Of Timers
2
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AT91SAM7xxxxx
No. Of I/o's
88
Ram Memory Size
32KB
Cpu Speed
48MHz
No. Of Timers
3
Rohs Compliant
Yes
For Use With
AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number
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Quantity
Price
Part Number:
AT91SAM7SE256-AU
Manufacturer:
ATMEL
Quantity:
165
Part Number:
AT91SAM7SE256-AU
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Quantity:
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Part Number:
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Quantity:
10 000
20.2.5.4
20.2.5.5
6222F–ATARM–14-Jan-11
Flash Lock Commands
Flash General-purpose NVM Commands
Lock bits can be set using WPL or EWPL commands. They can also be set by using the Set
Lock command (SLB). With this command, several lock bits can be activated. A Bit Mask is pro-
vided as argument to the command. When bit 0 of the bit mask is set, then the first lock bit is
activated.
In the same way, the Clear Lock command (CLB) is used to clear lock bits. All the lock bits are
also cleared by the EA command.
Table 20-9.
Lock bits can be read using Get Lock Bit command (GLB). The n
n of the bit mask is set..
Table 20-10. Get Lock Bit Command
General-purpose NVM bits (GP NVM bits) can be set using the Set Fuse command (SFB). This
command also activates GP NVM bits. A bit mask is provided as argument to the command.
When bit 0 of the bit mask is set, then the first GP NVM bit is activated.
In the same way, the Clear Fuse command (CFB) is used to clear general-purpose NVM bits.
All the general-purpose NVM bits are also cleared by the EA command. The general-purpose
NVM bit is deactivated when the corresponding bit in the pattern value is set to 1.
Table 20-11. Set/Clear GP NVM Command
General-purpose NVM bits can be read using the Get Fuse Bit command (GFB). The n
NVM bit is active when bit n of the bit mask is set..
Table 20-12. Get GP NVM Bit Command
Step
1
2
Step
1
2
Step
1
2
Step
1
2
Handshake Sequence
Write handshaking
Write handshaking
Handshake Sequence
Write handshaking
Read handshaking
Handshake Sequence
Write handshaking
Write handshaking
Handshake Sequence
Write handshaking
Read handshaking
Set and Clear Lock Bit Command
SAM7SE512/256/32 Preliminary
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
DATA[15:0]
SLB or CLB
Bit Mask
DATA[15:0]
Lock Bit Mask Status
0 = Lock bit is cleared
1 = Lock bit is set
DATA[15:0]
DATA[15:0]
GFB
GP NVM Bit Mask Status
0 = GP NVM bit is cleared
1 = GP NVM bit is set
GLB
SFB or CFB
GP NVM bit pattern value
th
lock bit is active when the bit
th
125
GP

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