MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 109

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

9.1 Timer Structure
TECHNICAL DATA
Figure 9-2 shows the capture/compare system block diagram. The port A pin control
block includes logic for timer functions and for general-purpose I/O. For pins PA3,
PA2, PA1, and PA0, this block contains both the edge-detection logic and the control
logic that enables the selection of which edge triggers an input capture. The digital lev-
el on PA[3:0] can be read at any time (read PORTA register), even if the pin is being
used for the input capture function. Pins PA[6:3] are used for either general-purpose
I/O, or as output compare pins. When one of these pins is being used for an output
compare function, it cannot be written directly as if it were a general-purpose output.
Each of the output compare functions (OC[5:2]) is related to one of the port A output
pins. Output compare one (OC1) has extra control logic, allowing it optional control of
any combination of the PA[7:3] pins. The PA7 pin can be used as a general-purpose
I/O pin, as an input to the pulse accumulator, or as an OC1 output pin.
Control Bits
overflow —
overflow —
overflow —
overflow —
1 count —
1 count —
1 count —
1 count —
PR1, PR0
0 0
0 1
1 0
1 1
65.536 ms
262.14 ms
524.29 ms
4.0 MHz
1.0 MHz
1000 ns
16.0 s
1.049 s
1.0 s
4.0 s
8.0 s
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 9-1 Timer Summary
Go to: www.freescale.com
32.768 ms
131.07 ms
262.14 ms
524.29 ms
8.0 MHz
2.0 MHz
500 ns
500 ns
2.0 s
4.0 s
8.0 s
XTAL Frequencies
TIMING SYSTEM
Main Timer Count Rates
87.381 ms
174.76 ms
21.845 ms
349.52 ms
12.0 MHz
1.333 s
2.667 s
5.333 s
3.0 MHz
333 ns
333 ns
16.384 ms
65.536 ms
131.07 ms
262.14 ms
16.0 MHz
4.0 MHz
250 ns
250 ns
1.0 s
2.0 s
4.0 s
Other Rates
(2
(2
(2
(2
(16/E)
(1/E)
(1/E)
(4/E)
(8/E)
16
18
19
20
(E)
/E)
/E)
/E)
/E)
9-3