MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 122

• Manufacturer Part Number: MCHC11F1CFNE3
• Description: IC MCU 8BIT 1K RAM 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MCHC11F1CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• A/d Inputs: 8-Channel, 8-Bit
• Eeprom Memory: 512 Bytes
• Input Output: 30
• Interface: SCI/SPI
• Memory Type: EPROM
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Controller Family/series: 68HC11
• No. Of I/o's: 30
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC11F
• Core: HC11
• Data Bus Width: 8 bit
• Program Memory Size: 512 B
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: RoHS Compliant part

9.6.1 Pulse Accumulator Control Register
9-16
PA7/
PAI/
OC1
PIN
(FROM MAIN TIMER)
Pulse accumulator control bits are also located within two timer registers, TMSK2 and
TFLG2, as described in the following paragraphs.
Four of this register's bits control an 8-bit pulse accumulator system. Another bit en-
ables either the OC5 function or the IC4 function, while two other bits select the rate
for the real-time interrupt system.
PORT A PIN 7
FROM DATA
MAIN TIMER
E 64 CLOCK
Crystal Frequency
DIRECTION
BIT FOR
FROM
12.0 MHz
16.0 MHz
4.0 MHz
8.0 MHz
OC1
(4 E)
OUTPUT
BUFFER
EDGE DETECTOR
INPUT BUFFER
AND
Freescale Semiconductor, Inc.
Table 9-5 Pulse Accumulator Timing
For More Information On This Product,
E Clock
1.0 MHz
2.0 MHz
3.0 MHz
4.0 MHz
TMSK2 INT ENABLES
Figure 9-3 Pulse Accumulator
(E)
PACTL CONTROL
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DATA BUS
TIMING SYSTEM
Cycle Time
1000 ns
MUX
500 ns
333 ns
250 ns
2:1
(1/E)
INTERNAL
DATA BUS
PAI EDGE
PAEN
PAEN
CLOCK
21.33 s
16.0 s
(64/E)
64 s
32 s
2
6
TFLG2 INTERRUPT STATUS
/E
OVERFLOW
ENABLE
PACNT 8-BIT COUNTER
PAOVI
PAOVF
PAII
PAIF
PACNT Overflow
DISABLE
FLAG SETTING
TECHNICAL DATA
16.384 ms
(16384/E)
8.192 ms
5.461 ms
4.096 ms
MC68HC11F1
INTERRUPT
REQUESTS
1
2