TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 387

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TMPM362F10FG

Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet

Specifications of TMPM362F10FG

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
 Details
Other names
Q5704184A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
Part Number:
TMPM362F10FG(C)
Manufacturer:
Toshiba
Quantity:
10 000
12.3
SCLKx output
SCLKx input
Figure 12-1 shows SIO block diagram.
RXDx
Configuration
f sys
φT0
SCxMOD0
I/O interface mode
φT1
φT4
φT16
φT64
<RXE>
FIFO control
RB8 Receive buffer (SCxBUF)
RXDCLK
SCxBRCR
<BRCK>
φT1
Baud rate generator
Serial clock generation circuit
2
Internal data bus
Receive control
Receive counter
(only at UART÷16)
Receive shifit register
4
Prescaler
φT4
SCxBRCR
8
<BRS>
16 32 64 128
<BRADDE>
SCxBRCR
φT16
Figure 12-1 SIO Block Diagram
SCxBRADD
<OERR><PERR><FERR>
<BRK>
SCxMOD0
<WU>
φT64
Error Flag
(from TMRBx)
<PE> <EVEN>
÷2
Parity control
SCxCR
TBxOUT
SCxCR
Serial channel
interrupt
control
SCxMOD0
Page 363
SCxCR
<IOC>
<SC>
Internal data bus
I/O interface
mode
UART
SCxMOD0
DMA control
<SM>
TB8 Transmit buffer (SCxBUF)
TXDCLK
Transmit shift register
Transmission control
Transmit control
Internal data bus
(only at UART÷16)
SIOCLK
FIFO control
SCxMOD0
<CTSE>
DMA clear (SIODMACLR1)
DMA clear (SIODMACLR0)
DMA request (SIODMAREQ1)
DMA request (SIODMAREQ0)
Interrupt request (INTRXx)
Interrupt request (INTTXx)
CTSx
TXDx
TMPM362F10FG

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