TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 70

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

6.3
Clock control
<example> Transmission from NORMAL mode to SLOW mode
CGOSCCR<WUPT[11:0]> = "0x200"
CGOSCCR<WUPTL[1:0]> = "0y00"
Read CGOSCCR<WUPT><WUPTL>
CGOSCCR<XTEN>="1"
CGOSCCR<WUPSEL>="1"
CGOSCCR<WUEON>="1"
Read CGOSCCR<WUEF>
CGOSCCR<SYSCK>="1"
Read CGOSCCR<SYSCKFLG>
CGOSCCR<XEN>="0"
Note 1: It is not required the warm-up time in using the external clock to be stabled.
Note 2: The warm-up timer operates according to the oscillation clock, and it may contain errors if there is any fluctua-
Note 3: When switching the system clock, ensure that the switching has been completed by reading the
Note 4: After setting warm-up count value to OSCCR<WUPT><WUPTL>, wait until confirming of the value to be reflec-
<example 2> Setting 1 s of warm-up time with low-speed oscillator (32.768kHz)
Drop the last 4 bits, set 0x200 into CGOSCCR<WUPT[11:0]> and 0y00 into CGOSCCR<WUPTL[1:0]>.
The following shows the warm-up setting.
tion in the oscillation frequency. Therefore, the warm-up time should be taken as approximate time.
CGSYSCR<SYSCKFLG>.
ted, then change to the standby mode by WFI instruction.
: Warm-up time setting (Upper 12 bits)
: Warm-up time setting (Lower 2 bits)
: Check warm-up time setting
: Enable low-speed oscillation (fs)
: Select XT1 for warm-up clock
: Enable warm-up counting (WUP)
: Wait for "0" (end of WUP)
: system clock changed to low-speed (fs)
: Wait for "1" (the current clock is fs)
: Disable the high-speed oscillation (fc)
(In dual clock mode, it’s not required.)
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TMPM362F10FG