AD9923BBCZ Analog Devices Inc, AD9923BBCZ Datasheet - Page 25

• Manufacturer Part Number: AD9923BBCZ
• Manufacturer: Analog Devices Inc

Specifications of AD9923BBCZ

• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 36MSPS
• Input Voltage Range: 0.7V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -25C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 105
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Compliant

VERTICAL TIMING GENERATION
The AD9923 provides a very flexible solution for generating
vertical CCD timing; it can support multiple CCDs and different
system architectures. The 13-phase vertical transfer clocks, XV1 to
XV13, are used to shift lines of pixels into the horizontal output
register of the CCD. The AD9923 allows these outputs to be
individually programmed into various readout configurations,
using a four-step process as shown in Figure 35.
1.
2.
Use the vertical pattern group registers to create the individual
pulse patterns for XV1 to XV13.
Use the V-pattern groups to build the sequences and add more
information.
1
VPAT 0
VPAT 1
4
CREATE THE VERTICAL PATTERN GROUPS,
UP TO FOUR TOGGLE POSITIONS FOR EACH OUTPUT.
FIELD 0
FIELD 3
FIELD 5
USE THE MODE REGISTER TO CONTROL WHICH FIELDS
ARE USED, AND IN WHAT ORDER (MAXIMUM OF SEVEN
FIELDS MAY BE COMBINED IN ANY ORDER).
XV11
XV12
XV11
XV12
XV1
XV2
XV3
XV1
XV2
XV3
FIELD 1
FIELD 4
FIELD 1
FIELD 2
FIELD 4
Figure 35. Summary of Vertical Timing Generation
FIELD 2
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(VPAT1, N REP)
V-SEQUENCE 0
V-SEQUENCE 1
V-SEQUENCE 2
(VPAT0, 1 REP)
(VPAT1, 2 REP)
FIELD 0
3.
4.
3
2
BUILD EACH FIELD BY DIVIDING IT INTO DIFFERENT
REGIONS AND ASSIGNING A V-SEQUENCE TO EACH
(MAXIMUM OF NINE REGIONS IN EACH FIELD).
FIELD 1
Construct the readout for an entire field by dividing the field
into regions and assigning a sequence to each region. Each
field can contain up to nine regions to accommodate different
steps, such as high speed line shifts and unique vertical line
transfers, of the readout. The total number of V-patterns,
V-sequences, and fields are programmable and limited by the
number of registers. High speed line shifts and unique vertical
transfers are examples of the different steps required for
readout.
Use the MODE register to combine fields in any order for
various readout configurations.
BUILD THE V-SEQUENCES BY ADDING START POLARITY,
LINE START POSITION, NUMBER OF REPEATS, ALTERNATION,
GROUP A/B INFORMATION, AND HBLK/CLPOB PULSES.
FIELD 2
XV11
XV12
XV11
XV12
XV11
XV12
REGION 0: USE V-SEQUENCE 2
REGION 1: USE V-SEQUENCE 0
REGION 2: USE V-SEQUENCE 3
REGION 3: USE V-SEQUENCE 0
REGION 4: USE V-SEQUENCE 2
XV1
XV2
XV3
XV1
XV2
XV3
XV1
XV2
XV3
REGION 0: USE V-SEQUENCE 3
REGION 1: USE V-SEQUENCE 2
REGION 2: USE V-SEQUENCE 1
REGION 0: USE V-SEQUENCE 3
REGION 1: USE V-SEQUENCE 2
REGION 2: USE V-SEQUENCE 1
AD9923