AD9923BBCZ Analog Devices Inc, AD9923BBCZ Datasheet - Page 27

• Manufacturer Part Number: AD9923BBCZ
• Manufacturer: Analog Devices Inc

Specifications of AD9923BBCZ

• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 36MSPS
• Input Voltage Range: 0.7V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -25C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 105
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Compliant

Vertical Sequences (VSEQ)
A vertical sequence (VSEQ) is created by selecting one of the
V-pattern groups and adding repeats, a start position, and
horizontal clamping and blanking information. Each VSEQ is
programmed using the registers shown in Table 15. Figure 37
shows how each register is used to generate a V-sequence.
The VPATSELA and VPATSELB registers select which V-pattern
group is used in a given V-sequence. Having two groups available
allows each vertical output to be mapped to a different V-pattern
group. The selected V-pattern group can have repetitions added
for high speed line shifts or line binning by using the VREP
registers for odd and even lines. Generally, the same number of
repetitions is programmed into both registers. If a different
number of repetitions is required on odd and even lines, separate
XV1 TO XV13
CLPOB
HBLK
PBLK
HD
PROGRAMMABLE SETTINGS FOR EACH VERTICAL SEQUENCE:
1. START POSITION IN THE LINE OF SELECTED V-PATTERN GROUP.
2. HD LINE LENGTH.
3. V-PATTERN SELECT (VPATSEL) TO SELECT ANY V-PATTERN GROUP.
4. NUMBER OF REPETITIONS OF THE V-PATTERN GROUP (IF NEEDED).
5. START POLARITY AND TOGGLE POSITIONS FOR CLPOB AND PBLK SIGNALS.
6. MASKING POLARITY AND TOGGLE POSITIONS FOR HBLK SIGNAL.
6
V-PATTERN GROUP
1
3
Figure 37. V-Sequence Programmability
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VREP 2
4
2
values can be used for each register (see the Generating Line
Alternation for V-Sequences and HBLK section). The VSTARTA
and VSTARTB registers specify the pixel location where the
V-pattern group starts. The VMASK register is used in conjunction
with the FREEZE/RESUME registers to enable optional masking of
the XV outputs. Either or both of the FREEZE1/RESUME1 and
FREEZE2/RESUME2 registers can be enabled.
The line length (in pixels) is programmable using the HDLEN
registers. Each V-sequence can have a different line length to
accommodate various image readout techniques. The maximum
number of pixels per line is 8192. Note that the last line of the
field can be programmed separately using the HDLAST register,
located in the field register (see Table 16).
VREP 3
4
AD9923