LSI53CF92A LSI, LSI53CF92A Datasheet - Page 110

• Manufacturer Part Number: LSI53CF92A
• Manufacturer: LSI

Specifications of LSI53CF92A

• Lead Free Status / RoHS Status: Not Compliant

5.5.1 Send Message
5.5.2 Send Status
5.5.3 Send Data
5-18
Table 5.12
Table 5.12
This command causes the FSC to assert Message In phase and sends
bytes until the FIFO is empty or the transfer counter is zero (if DMA).
This command causes the FSC to assert Status phase and sends bytes
until the FIFO is empty or the transfer counter is zero (if DMA).
This command causes the FSC to assert Data In phase and sends bytes
until the FIFO is empty, or the transfer counter is zero and the FIFO is
empty (if DMA). DMA must be used for synchronous transfers.
Command Set
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
Non-DMA
0x20
0x21
0x22
0x23
0x24
0x25
0x27
0x28
0x29
0x2A
0x2B
0x04
lists the Target commands.
Target Commands
DMA
0xA0
0xA1
0xA2
0xA3
0xA4
0xA5
–
0xA8
0xA9
0xAA
0xAB
–
Mnemonic
Send Message
Send Status
Send Data
Disconnect Sequence
Terminate Sequence
Target Command Complete Sequence
Disconnect
Receive Message
Receive Command
Receive Data
Receive Command Sequence
Target Abort DMA