LSI53CF92A-64QFP LSI, LSI53CF92A-64QFP Datasheet - Page 97

no-image

LSI53CF92A-64QFP

Manufacturer Part Number
LSI53CF92A-64QFP
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53CF92A-64QFP

Lead Free Status / RoHS Status
Supplier Unconfirmed
5.2.4 Reset SCSI Bus
5.2.5 Disable Selection/Reselection
This command asserts the RST/ (SCSI Reset Output) signal for T2 s,
where:
CCF = Clock Conversion Factor. Refer to the description of Write Register
0x09
substitute 8 for 0 in this calculation. CLK is the clock input to the FSC.
An interrupt is generated unless it is disabled in the Config 1 register.
This command disables an earlier Enable Selection/Reselection
command. If bus-initiated selection or reselection has not begun when
this command is received by the FSC, it generates a Function Complete
interrupt. If bus-initiated selection or reselection has begun, this
command (and all other commands) is ignored. Refer to
Section 2.2.1, “Bus-Initiated Selection,”
Section 2.2.2, “Bus-Initiated Reselection,”
When this command is loaded into the
bus-initiated selection or reselection that is already requested begins
immediately. Because there is no delay in execution of the selection or
reselection, the Function Complete Interrupt bit is not set inadvertently if
the selection or reselection sequence continues after this command has
been loaded.
Miscellaneous Command Group
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
T2 = 130 (CLK period) (CCF)
in
Chapter 4, “Registers.”
For CCF = 0, indicating 8 clocks,
on
Command
on
page 2-4,
page 2-5,
register, any
and
for details.
5-5

Related parts for LSI53CF92A-64QFP