MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 1047

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

25.3.2.7
The ECMD register is the EEPROM command register.
All CMDB bits are readable and writable during a command write sequence while bit 7 reads 0 and is not
writable.
25.3.2.8
This register is reserved for factory testing and is not accessible.
All bits read 0 and are not writable.
Freescale Semiconductor
CMDB[6:0]
EEPROM Address Registers (EADDR)
Reset
Reset
Field
6:0
W
W
R
R
EEPROM Command Bits — Valid EEPROM commands are shown in
than those listed in
EEPROM Command Register (ECMD)
RESERVED3
0
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
6
6
Figure 25-11. EEPROM Command Register (ECMD)
Table 25-8
Table 25-8. Valid EEPROM Command List
CMDB[6:0]
Table 25-7. ECMD Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0x05
0x20
0x40
0x41
0x47
0x60
sets the ACCERR flag in the ESTAT register.
0
0
0
5
5
Figure 25-12. RESERVED3
0
0
0
4
4
Sector Erase Abort
Description
Word Program
Sector Modify
Sector Erase
Erase Verify
Mass Erase
Command
CMDB
Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
0
0
0
3
3
Table
0
0
0
2
2
25-8. Writing any command other
0
0
0
1
1
0
0
0
0
0
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