MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 59

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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pull-down device which is only active when RESET is low. TAGHI is used to tag the high half of the
instruction word being read into the instruction queue.
The input voltage threshold for PE6 can be configured to reduced levels, to allow data from an external
3.3-V peripheral to be read by the MCU operating at 5.0 V. The input voltage threshold for PE6 is
configured to reduced levels out of reset in expanded and emulation modes.
1.2.3.18
PE5 is a general-purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the
read enable RE output. This pin is an input with a pull-down device which is only active when RESET is
low. TAGLO is used to tag the low half of the instruction word being read into the instruction queue.
The input voltage threshold for PE5 can be configured to reduced levels, to allow data from an external
3.3-V peripheral to be read by the MCU operating at 5.0 V. The input voltage threshold for PE5 is
configured to reduced levels out of reset in expanded and emulation modes.
1.2.3.19
PE4 is a general-purpose input or output pin. It can be configured to drive the internal bus clock ECLK.
ECLK can be used as a timing reference.
1.2.3.20
PE3 is a general-purpose input or output pin. In MCU expanded modes of operation, LSTRB or LDS can
be used for the low byte strobe function to indicate the type of bus access. At the rising edge of RESET
the state of this pin is latched to the EROMON bit.
1.2.3.21
PE2 is a general-purpose input or output pin. In MCU expanded modes of operations, this pin drives the
read/write output signal or write enable output signal for the external bus. It indicates the direction of data
on the external bus
1.2.3.22
PE[6:2] are general-purpose input or output pins.
1.2.3.23
PE1 is a general-purpose input pin and the maskable interrupt request input that provides a means of
applying asynchronous interrupt requests. This will wake up the MCU from stop or wait mode.
1.2.3.24
PE0 is a general-purpose input pin and the non-maskable interrupt request input that provides a means of
applying asynchronous interrupt requests. This will wake up the MCU from stop or wait mode.
Freescale Semiconductor
PE5 / MODA / TAGLO / RE — Port E I/O Pin 5
PE4 / ECLK — Port E I/O Pin 4
PE3 / LSTRB / LDS / EROMCTL— Port E I/O Pin 3
PE2 / R/W / WE— Port E I/O Pin 2
PE[6:2] — Port E I/O Pins
PE1 / IRQ — Port E Input Pin 1
PE0 / XIRQ — Port E Input Pin 0
MC9S12XDP512 Data Sheet, Rev. 2.21
Chapter 1 Device Overview MC9S12XD-Family
59

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