MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 507

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
1 928
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCA
Quantity:
2 246
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4 576
Part Number:
MC9S12XDP512CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4 576
Figure 11-26
after the reset is low but is not preceded by three high samples that would qualify as a falling edge.
Depending on the timing of the start bit search and on the data, the frame may be missed entirely or it may
set the framing error flag.
In
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
11.4.6.4
If the data recovery logic does not detect a logic 1 where the stop bit should be in an incoming frame, it
sets the framing error flag, FE, in SCI status register 1 (SCISR1). A break character also sets the FE flag
because a break character has no stop bit. The FE flag is set at the same time that the RDRF flag is set.
Freescale Semiconductor
Figure
RT Clock Count
Reset RT Clock
RT Clock Count
Reset RT Clock
RT Clock
RT Clock
Samples
Samples
11-27, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
RXD
RXD
shows a burst of noise near the beginning of the start bit that resets the RT clock. The sample
Framing Errors
1
1
1
1
1
1
1
1
1
1
Figure 11-26. Start Bit Search Example 5
1
Figure 11-27. Start Bit Search Example 6
1
1
MC9S12XDP512 Data Sheet, Rev. 2.21
1
1
1
1
1
0
0
0
0
0
1
Chapter 11 Serial Communication Interface (S12SCIV5)
Start Bit
0
Start Bit
1
1
0
0
0
No Start Bit Found
1
0
0
0
0
0
0
LSB
LSB
507

Related parts for MC9S12XDP512CAL