WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 370
WG82574L S LBA8
Manufacturer Part Number
WG82574L S LBA8
Description
Manufacturer
Intel
Datasheet
1.WG82574L_S_LBA8.pdf
(472 pages)
Specifications of WG82574L S LBA8
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Compliant
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10.2.9.15
10.2.10
Table 79.
Table 80.
Note:
370
Time Adjustment Offset Register High - TIMADJH (Offset 0B610; RW)
MSI-X Register Descriptions
These registers are used to configure the MSI-X mechanism. The address and upper
address registers set the address for each of the vectors. The message register sets the
data sent to the relevant address. The vector control registers are used to enable
specific vectors.
The Pending Bit Array register indicates which vectors have pending interrupts.
The structure is listed in
MSI-X Table Structure
MSI-X PBA Structure
The table lists the general case. In the 82574 N = 5. As a result, only Qword0 is
implemented.
Vector Control
Vector Control
Vector Control
Vector Control
Vector Control
Pending bits 0 through 63
Pending bits 64 through 127
…
Pending bits ((N-1) div 64)*64
through N-1
30:0
Bit
31
Dword3
Type
RW
RW
63:0
Msg Data
Msg Data
Msg Data
Msg Data
Msg Data
Dword2
Reset
0x00
0x0
Table
Msg Upper Addr
Msg Upper Addr
Msg Upper Addr
Msg Upper Addr
Msg Upper Addr
79.
Dword1
TADJH
Time adjustment value - high.
Sign
Sign (“0”=”+”, “1”=”-“)
Qword((N-1) div 64)
Qword0
Qword1
82574 GbE Controller—Driver Programing Interface
…
Msg Addr
Msg Addr
Msg Addr
Msg Addr
Msg Addr
Dword0
Description
Entry 0
Entry 1
Entry 2
Entry 3
Entry 4
Base + ((N-1) div 64)*8
Base+1*8
Base
Base
Base + 1*16
Base + 2*16
Base + 3*16
Base + 4*16
…
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