NSC800N-1 National Semiconductor, NSC800N-1 Datasheet - Page 31

• Manufacturer Part Number: NSC800N-1
• Description: IC CPU 8BIT 1MHZ 40-DIP
• Manufacturer: National Semiconductor

Specifications of NSC800N-1

• Processor Type: 8-Bit CMOS
• Speed: 1MHz
• Voltage: 4.5 ~ 5.5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: *NSC800N-1; NSC800; NSC800-1

12 0 Instruction Set
12 2 INSTRUCTION SET MNEMONIC NOTATION
In the following instruction set listing the notations used are
shown below
b
cc
d
kk
m
m
n
nn
p
pp
qq
r
rr
ss
X
X
( )
L
H
1
2
Designates one bit in a register or memory location
Bit address mode uses this indicator
Designates condition codes used in conditional
Jumps Calls and Return instruction may be
NZ
NC
PO
PE
Designates an 8-bit signed complement displace-
ment Relative or indexed address modes use this
indicator
Subset of cc condition codes used in conjunction with
conditional relative jumps may be NZ Z NC or C
Designates (HL) (IX
or indexed address modes use this indicator
Designates (BC) (DE) or (nn) Register indirect or di-
rect address modes use this indicator
Any 8-bit binary number
Any 16-bit binary number
Designates restart vectors and may be the hex values
0 8 10 18 20 28 30 or 38 Restart instructions
employing the modified page zero addressing mode
use this indicator
Designates the BC DE SP or any 16-bit register used
as a destination operand in 16-bit arithmetic opera-
tions employing the register address mode
Designates BC DE HL A F IX or IY during opera-
tions employing register address mode
Designates A B C D E H or L Register addressing
modes use this indicator
Designates BC DE HL SP IX or IY Register ad-
dressing modes use this indicator
Designates HL IX or IY Register addressing modes
use this indicator
Subscript L indicates the lower-order byte of a 16-bit
register
Subscript H indicates the high-order byte of a 16-bit
register
parentheses indicate the contents are considered a
pointer address to a memory or I O location
P
Z
C
M
e
e
e
e
e
e
e
e
Zero (Z flag
Carry (C flag
Parity Even or Overflow (P V
Positive (S
Non-Zero (Z flag
Non-Carry (C flag
Parity Odd or No Overflow (P V
Negative (S
e
e
e
e
0)
a
1)
1)
1)
d) or (IY
e
e
0)
(Continued)
0)
a
d) Register indirect
e
1)
e
0)
31
12 3 ASSEMBLED OBJECT CODE NOTATION
Register Codes
000
001
010
011
100
101
111
Restart Addresses
r
Conditions Codes
000
001
010
011
100
101
110
111
cc
kk
00
01
10
11
000
001
010
011
100
101
110
111
t
Register
D
H
B
C
E
L
A
Mnemonic
Mnemonic
NZ
NC
PO
NZ
NC
PE
C
M
C
X’00
X’08
X’10
X’18
X’20
X’28
X’30
X’38
Z
P
Z
T
pp
00
01
10
11
00
01
10
11
rp
Register
Register
BC
DE
HL
SP
BC
DE
SP
IX
True Flag Condition
True Flag Condition
P V
P V
qq
00
01
10
11
00
01
10
11
rs
Z
Z
C
C
S
S
Z
Z
C
C
e
e
e
e
e
e
e
e
e
e
e
e
0
1
0
1
0
1
0
1
0
1
0
1
Register
Register
BC
DE
HL
AF
BC
DE
HL
AF