NSC800N-1 National Semiconductor, NSC800N-1 Datasheet - Page 34

• Manufacturer Part Number: NSC800N-1
• Description: IC CPU 8BIT 1MHZ 40-DIP
• Manufacturer: National Semiconductor

Specifications of NSC800N-1

• Processor Type: 8-Bit CMOS
• Speed: 1MHz
• Voltage: 4.5 ~ 5.5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: *NSC800N-1; NSC800; NSC800-1

12 5 16-Bit Loads
REGISTER TO REGISTER
LD
Load 16-bit register pair with immediate data
rr
Timing
Addressing Mode
Timing
Addressing Mode
LD
Load the SP from 16-bit register ss
SP
Timing
Addressing Mode
Timing
Addressing Mode
7
0
7 6
1 1 N
0 0
7
1
7 6
1 1 N
1 1
w
w
6
0
6
1
n (high-order byte)
n (high-order byte)
n (low-order byte)
n (low-order byte)
rr nn
SP ss
nn
ss
5
5
1
5
1
5
1
X
X
rp
4
4
1
4 3 2 1 0
1 1 1 0 1
0 0 0 0 1
4 3 2 1 0
1 1 1 0 1
1 1 0 0 1
3
0
3
1
2
0
2
0
1
0
1
0
0
1
0
1
No flags affected
M cycles 3
T states 10 (4 3 3)
Source Immediate Extended
Destination Register
M cycles 4
T states 14 (4 4 3 3)
Source Immediate Extended
Destination Register
No flags affected
M cycles 1
T states 6
Source Register
Destination Register (Implied)
M cycles 2
T states 10 (4 6)
Source Register
Destination Register (Implied)
LD BC nn
LD DE nn
LD HL nn
LD SP nn
LD IX nn (for N
LD SP HL
LD SP IX (for N
LD IY nn (for N
LD SP IY (for N
X
X
X
X
e
e
e
e
0)
1)
0)
1)
34
REGISTER TO MEMORY
LD
Load memory location nn with contents of 16-bit register rr
(nn)
(nn
Timing
Addressing Mode
Timing
Addressing Mode
Timing
Addressing Mode
7
0
7
1
0
7 6
1 1 N
0 0
a
w
6
0
6
1
1
n (high-order byte)
n (high-order byte)
n (high-order byte)
n (low-order byte)
n (low-order byte)
n (low-order byte)
1)
(nn) rr
5
1
5
1
5
1
rr
w
X
rp
L
4
0
4
0
4 3 2 1 0
1 1 1 0 1
0 0 0 1 0
rr
H
3
0
3
1
0
2
0
2
1
0
1
1
1
0
1
0
0
0
1
1
No flags affected
M cycles 5
T states 16 (4 3 3 3 3)
Source Register
Destination Direct
M cycles 6
T states 20 (4 4 3 3 3 3)
Source Register
Destination Direct
M cycles 6
T states 20 (4 4 3 3 3 3)
Source Register
Destination Direct
LD (nn) BC
LD (nn) DE
LD (nn) HL
LD (nn) SP
LD (nn) HL
(note an alternate
opcode below)
LD (nn) IX (for N
LD (nn) IY (for N
X
X
e
e
1)
0)