NSC800N-1 National Semiconductor, NSC800N-1 Datasheet - Page 49
NSC800N-1
Manufacturer Part Number
NSC800N-1
Description
IC CPU 8BIT 1MHZ 40-DIP
Manufacturer
National Semiconductor
Datasheet
1.NSC800N-1.pdf
(76 pages)
Specifications of NSC800N-1
Processor Type
8-Bit CMOS
Speed
1MHz
Voltage
4.5 ~ 5.5V
Mounting Type
Through Hole
Package / Case
40-DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
*NSC800N-1
NSC800
NSC800-1
NSC800
NSC800-1
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12 9 Rotate and Shift
Timing
Addressing Mode
Timing
Addressing Mode
REGISTER MEMORY
RLD
Rotate digit left and right between the Accumulator and
memory (HL)
Timing
Addressing Mode
7 6
1 1 N
1 1
0 0
7 6 5 4 3 2 1 0
1 1 0 0 1 0 1 1
0 0 1 1 1 1 1 0
7
1
0
6
1
1
5
0
1
5
1
1
X
4 3 2 1 0
1 1 1 0 1
0 1 0 1 1
1 1 1 1 0
4
0
0
d
3
1
1
2
1
1
P V Set if result parity is even
1
0
1
H Reset
N Reset
S Set if result is negative
C N A
Z Set if result is zero
M cycles
T states
Register Indirect
M cycles
T states
Indexed
M cycles
T states
Implied Register Indirect
0
1
1
SRL (IX
SRL (IY
SRL (HL)
(Continued)
15 (4 4 4 3)
23 (4 4 3 5 4 3)
18 (4 4 3 4 3)
a
a
4
6
5
d) (for N
d) (for N
TL C 5171– 71
X
X
e
e
0)
1)
49
RRD
Rotate digit right and left between the Accumulator and
memory (HL)
Timing
Addressing Mode
12 10 Exchanges
REGISTER REGISTER
EX
Exchange the contents of the 16-bit register pairs DE and
HL
DE
Timing
Addressing Mode
EX
The contents of the Accumulator and flag register are ex-
changed with their corresponding alternate registers that is
A and F are exchanged with A’ and F’
A
F
Timing
Addressing Mode
7
1
0
7
1
7
0
6
1
1
6
1
6
0
DE HL
AF A’F’
F’
A’
5
1
1
5
1
5
0
HL
4
0
0
4
0
4
0
3
1
0
3
1
3
1
2
1
1
2
0
2
0
P V Set if result parity is even
1
0
1
1
1
1
0
H Reset
N Reset
C N A
S Set if result is negative
Z Set if result is zero
M cycles
T states
Implied Register Indirect
No flags affected
M cycles
T states
Register
No flags affected
M cycles
T states
Register
0
1
1
0
1
0
0
18 (4 4 3 4 3)
4
4
5
1
1
TL C 5171 – 72
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