TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 475

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
b. <mrbfemp>
c.
d. <mrepdset>
e. <mwepdset>
Indicates whether or not the buffer for the Master Read DMA in UDC2AB is empty.
0y0: Indicates the buffer for the Master Read DMA contains some data.
0y1: Indicates the buffer for the Master Read DMA is empty.
<mwbfemp>
Indicates whether or not the buffer for the Master Write DMA in UDC2AB is empty.
0y0: Indicates the buffer for the Master Write DMA contains some data.
0y1: Indicates the buffer for the Master Write DMA is empty.
This bit will be set to 1 when the data to be transmitted is set to the Tx-EP of UDC2 by
Master Read DMA transfer, making no room to write in the endpoint. It will turn to 0
when the data is transferred from UDC2 by the IN-Token from the host. While this bit is
set to 0, DMA transfers to the endpoint can be made. (This bit is the eptx_dataset input
signal with CLK_H synchronization.)
0y0: Data can be transferred into the endpoint.
0y1: There is no space to transfer data in the endpoint.
This bit will be set to 1 when the data received is set to the Rx-EP of UDC2. It will turn to
0 when the entire data was read by the DMA for Master Write. (This bit is the
eprx_dataset input signal with CLK_H synchronization.)
0y0: No data exists in the endpoint.
0y1: There is some data to be read in the endpoint.
TMPA901CM- 474
TMPA901CM
2010-07-29

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