TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 97

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

DMACIntStaus
DMACIntTCStatus
DMACIntTCClear
DMACIntErrorStatus
DMACIntErrClr
DMACRawIntTCStatus
DMACRawIntErrorStatus
DMACEnbldChns
DMACSoftBReq
DMACSoftSReq
DMACConfiguration
DMACC0SrcAddr
DMACC0DestAddr
DMACC0LLI
DMACC0Control
DMACC0Configuration
DMACC1SrcAddr
DMACC1DestAddr
DMACC1LLI
DMACC1Control
DMACC1Configuration
DMACC2SrcAddr
DMACC2DestAddr
DMACC2LLI
DMACC2Control
DMACC2Configuration
DMACC3SrcAddr
DMACC3DestAddr
DMACC3LLI
DMACC3Control
DMACC3Configuration
DMACC4SrcAddr
DMACC4DestAddr
DMACC4LLI
DMACC4Control
DMACC4Configuration
DMACC5SrcAddr
DMACC5DestAddr
DMACC5LLI
DMACC5Control
DMACC5Configuration
Register Name
3.8.3
The following lists the SFRs:
Register descriptions
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x018
0x01C
0x020
0x024
0x028
0x02C
0x030
0x034
0x100
0x104
0x108
0x10C
0x110
0x120
0x124
0x128
0x12C
0x130
0x140
0x144
0x148
0x14C
0x150
0x160
0x164
0x168
0x16C
0x170
0x180
0x184
0x188
0x18C
0x190
0x1A0
0x1A4
0x1A8
0x1AC
0x1B0
Address
(base+)
DMAC Interrupt Status Register
DMAC Interrupt Terminal Count Status Register
DMAC Interrupt Terminal Count Clear Register
DMAC Interrupt Error Status Register
DMAC Interrupt Error Clear Register
DMAC Raw Interrupt Terminal Count Status Register
DMAC Raw Error Interrupt Status Register
DMAC Enabled Channel Register
DMAC Software Burst Request Register
DMAC Software Single Request Register
Reserved
Reserved
DMAC Configuration Register
Reserved
DMAC Channel0 Source Address Register
DMAC Channel0 Destination Address Register
DMAC Channel0 Linked List Item Register
DMAC Channel0 Control Register
DMAC Channel0 Configuration Register
DMAC Channel1 Source Address Register
DMAC Channel1 Destination Address Register
DMAC Channel1 Linked List Item Register
DMAC Channel1 Control Register
DMAC Channel1 Configuration Register
DMAC Channel2 Source Address Register
DMAC Channel2 Destination Address Register
DMAC Channel2 Linked List Item Register
DMAC Channel2 Control Register
DMAC Channel2 Configuration Register
DMAC Channel3 Source Address Register
DMAC Channel3 Destination Address Register
DMAC Channel3 Linked List Item Register
DMAC Channel3 Control Register
DMAC Channel3 Configuration Register
DMAC Channel4 Source Address Register
DMAC Channel4 Destination Address Register
DMAC Channel4 Linked List Item Register
DMAC Channel4 Control Register
DMAC Channel4 Configuration Register
DMAC Channel5 Source Address Register
DMAC Channel5 Destination Address Register
DMAC Channel5 Linked List Item Register
DMAC Channel5 Control Register
DMAC Channel5 Configuration Register
TMPA901CM- 96
Table 3.8.3 SFR
Description
Base address
0xF410_0000
TMPA901CM
2010-07-29