TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 740

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
Note: It is not possible to set PMCCTL<PCM_ON> to “0y1” and to change the settings of other bits in the same
register (<PMCPWE>, <WMTM1>, <WMTM0>) simultaneously. <PMCPWE>, <WMTM1> and <WMTM0>
should be set while <PCM_ON> = “0y0”. Do not change the values of these bits when writing “0y1” to
<PCM_ON>.
Note: Programs to be started after Warm-up
In the startup program it is necessary to preapre a routine for checking PMCCTL<PCM_ON> and
branching program execution depending on the result. 。
Either the built-in BOOT_ROM or external memory (SMCCS0n) is selected and the program is started
according to the settings of the external AM0/1 pins after Wakeup as in the case system reset is asserted.
Whether system reset starting or Wakeup from the PCM state occurred can be known by checking the flag of
PMCCTL<PMC_ON> in the PMC circuit in the initial routine of the starting program.
Wakeup from the PCM state: PMCCTL<PMC_ON> = 0y1
System reset starting: PMCCTL<PMC_ON> = 0y0
after the wake-up interrupt. Then, after a specified warm-up period and an
additional interval of approximately 1 XT1 (32µs), the internal reset signal is
released. Since power stabilization time depends on the response of the power
source to be used and conditions on the system, determine the warm-up time in
consideration of the period required until power is stabilized. (The warm-up time
can be selected in the range of 15.625 ms to 125 ms.)
(6) Stop PLL operation.
(7) Set the warm-up time: PMCCTL<WUTM1:0>
(8) Disable the internal cache memory.
(9) Clear the wake-up request signals in the PMC
(10) Set the relevant PMC registers, and then set the corresponding bits in the
(11) Whether or not the values in each PMC register for which the corresponding
(12) Enable the Power Cut Mode (PMCCTL<PCM_ON> = “1”)
(13) Insert dummy instructions before transition to the Power Cut Mode,
Before entering the Power Cut Mode, the wake-up request signals in the PMC
circuit must be cleared.
The external PWE pin changes from “0” to “1” approximately 1.5 XT1 (48µs)
Stop the PLL circuit operation by setting high frequency clock to f
PMCWV1 register to enable the newly set values.
bit in the PMCWV1 register is enabled have been copied into the backup
register can be checked by reading the PMCRF1 register.
approximately 7 XT1 (224µs)
TMPA901CM- 739
TMPA901CM
OSCH.
2010-07-29

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